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1021 lines
28 KiB
1021 lines
28 KiB
/* |
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Clock for the STM32L031 |
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EXTI line |
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17 RTC alarm |
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19 RTC tamper & timestamp & CSS_LSE |
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20 RTC wakeup timer |
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PA0 TAMP2 Button |
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PA2 TAMP3 Button |
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__enable_irq(); |
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__disable_irq(); |
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*/ |
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#include <stdint.h> |
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#include <stddef.h> |
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#include "stm32l031xx.h" |
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#include "delay.h" |
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#include "u8g2.h" |
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//#include "rtc.h" |
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#include "key.h" |
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#include "gui.h" |
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/*=======================================================================*/ |
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/* Configuration */ |
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/* Note: 50ms systick */ |
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/* delay until other another button press is accepted */ |
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/* time is in systicks (50ms) */ |
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#define TAMPER_SYSTICK_DELAY 22 |
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/* delay until the menu goes back time display and standby mode */ |
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/* delay in systicks (50ms) */ |
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/* 50ms*20 = 1 second */ |
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/* 50ms*20*10 = 10 second */ |
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/* 50ms*20*18 = 18 second */ |
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#define MENU_IDLE_SYSTICK_TIMEOUT (20*18) |
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/* max alarm duration */ |
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/* time in systicks (50ms) */ |
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/* 50ms*20 = 1 second */ |
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/* 50ms*20*10 = 10 second */ |
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/* 50ms*20*18 = 18 second */ |
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/* 50ms*20*120 = 120 seconds */ |
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#define ALARM_MAX_SYSTICK_TIME (20*30) |
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/* wakeup period: The uC will wake up after the specified number of seconds */ |
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/* the value is one less the intended number of seconds: */ |
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/* 0: wakeup every 1 second */ |
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/* 14: wakeup every 15 seconds */ |
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/* 29: wakeup every 30 seconds */ |
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/* After wakeup the uC will refresh the display and check for the alarms. This means the wakeup time should not be */ |
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/* more than 1 minute. There might be also a delay of up to WAKEUP_PERIOD+1 seconds until the alarm is detected. */ |
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/* Large values reduce power consumtion, but displayed time and alarm might be later than the actual RTC time. */ |
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#define WAKEUP_PERIOD 14 |
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/* DST (daylight savings time) rules */ |
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/* 0: DST not applied */ |
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/* 1: EU */ |
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/* 2: US */ |
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#define DST_RULE 1 |
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/* Contrast value for the display in normal mode (u8g2_SetContrast). */ |
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/* 208: default value for the SSD1306 */ |
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#define DISPLAY_CONTRAST_NORMAL 210 |
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/* Contrast value for the display in standby mode, if the display mode DISPLAY_STANDBY_MODE_REDUCED is aktive. */ |
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/* 208: default value for the SSD1306, value 0 still shows something on the display */ |
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#define DISPLAY_CONTRAST_REDUCED 5 |
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/* the following variable defines the behavior of the display during standby of the uC */ |
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#define DISPLAY_STANDYB_MODE_ALWAYS_ON 0 |
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#define DISPLAY_STANDBY_MODE_REDUCED 1 |
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#define DISPLAY_STANDBY_MODE_OFF 2 |
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volatile unsigned long DisplayStandbyMode = DISPLAY_STANDBY_MODE_OFF; |
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/*=======================================================================*/ |
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/* external functions */ |
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uint8_t u8x8_gpio_and_delay_stm32l0(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr); |
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int is_dst_by_date(uint8_t region); |
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void adjustDST(uint8_t region); |
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/*=======================================================================*/ |
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/* global variables */ |
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#define RESET_REASON_POR 0 |
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#define RESET_REASON_NVIC_RESET 1 |
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#define RESET_REASON_TAMP2 2 |
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#define RESET_REASON_TAMP3 3 |
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#define RESET_REASON_WUF 4 |
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volatile unsigned long SysTickCount = 0; |
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volatile unsigned long RTCWUCount = 0; |
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volatile unsigned long RTCIRQCount = 0; |
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volatile unsigned long isIgnoreNextKey = 0; |
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volatile unsigned long Tamper2Count = 0; |
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volatile unsigned long Tamper3Count = 0; |
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volatile unsigned long MenuIdleTimer = 0; |
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volatile unsigned long PWR_CSR_Backup; |
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volatile unsigned long ResetReason = RESET_REASON_POR; |
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volatile unsigned long AlarmSeqPos = 0; |
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volatile unsigned long AlarmSeqDly = 0; |
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const uint8_t *AlarmSeqPtr = NULL; |
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const uint8_t *AlarmSeqStart = NULL; |
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volatile unsigned long AlarmSeqTime = 0; |
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volatile unsigned long RTCUpdateCount = 0; // decremented in SysTick IRQ if not 0 |
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volatile unsigned long NextDSTAdjustment = 0; |
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//rtc_t rtc; |
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u8g2_t u8g2; |
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/*=======================================================================*/ |
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#define AOff(dly) (0<<5)|((dly)&0x01f) |
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#define ABeep(dly) (1<<5)|((dly)&0x01f) |
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#define ARepeat() (0xfe) |
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#define AEnd() (0xff) |
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/*=======================================================================*/ |
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const uint8_t ASeqTrippleBeep[] = |
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{ ABeep(1),AOff(2), ABeep(1),AOff(2),ABeep(1),AOff(22), ARepeat() }; |
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/*=======================================================================*/ |
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void set_alarm_sequence(const uint8_t *alarm_sequence) |
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{ |
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GPIOA->BSRR = GPIO_BSRR_BR_6; /* atomic clr PA6 */ |
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AlarmSeqDly = 0; |
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AlarmSeqPtr = alarm_sequence; |
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AlarmSeqStart = alarm_sequence; |
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AlarmSeqTime = 0; |
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} |
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void ExecuteAlarmSequenceStep(void) |
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{ |
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if ( AlarmSeqPtr == NULL ) |
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return; |
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//AlarmSeqTime++; |
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//if ( AlarmSeqTime > ALARM_MAX_SYSTICK_TIME ) |
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//{ |
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// set_alarm_sequence(NULL); |
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// gui_data.is_alarm = 0; // disable alarm |
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// return; |
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//} |
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if ( AlarmSeqDly > 0 ) |
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{ |
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AlarmSeqDly--; |
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return ; |
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} |
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switch( (*AlarmSeqPtr)>>5 ) |
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{ |
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case 0: |
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GPIOA->BSRR = GPIO_BSRR_BR_6; /* atomic clr PA6 */ |
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AlarmSeqDly = ((*AlarmSeqPtr) & 0x01f); |
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break; |
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case 1: |
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GPIOA->BSRR = GPIO_BSRR_BS_6; /* atomic set PA13 */ |
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AlarmSeqDly = ((*AlarmSeqPtr) & 0x01f); |
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break; |
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default: |
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if ( *AlarmSeqPtr == 0x0fe ) |
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AlarmSeqPtr = AlarmSeqStart; |
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return; |
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} |
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AlarmSeqPtr++; |
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} |
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void SetAlarmSequence(const uint8_t *alarm_sequence) |
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{ |
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__disable_irq(); |
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set_alarm_sequence(alarm_sequence); |
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__enable_irq(); |
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} |
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/*=======================================================================*/ |
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void __attribute__ ((interrupt, used)) SysTick_Handler(void) |
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{ |
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int is_t2 = 0; |
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int is_t3 = 0; |
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SysTickCount++; |
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/* read the tamper/button state */ |
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/* this is more complicated, because there are no external pull ups for the buttons */ |
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/* pull ups can be activated via GPIO, but are disabled if the pin is configured as tamper input */ |
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/* As a consequence, we have to disable tamper (so that the internal pullups are active), then */ |
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/* after some delay, get the GPIO value of the tamper input and restore tamper status */ |
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if ( Tamper2Count > 0 || Tamper3Count > 0 ) |
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{ |
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RTC->WPR = 0x0ca; /* disable RTC write protection */ |
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RTC->WPR = 0x053; |
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RTC->TAMPCR &= ~RTC_TAMPCR_TAMP2E; /* disable tamper so that we can do normal GPIO access */ |
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RTC->TAMPCR &= ~RTC_TAMPCR_TAMP3E; /* disable tamper so that we can do normal GPIO access */ |
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__NOP(); /* add delay after disable tamper so that GPIO can read the value */ |
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__NOP(); |
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is_t2 = (GPIOA->IDR & GPIO_IDR_ID0) != 0 ? 1 : 0; |
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is_t3 = (GPIOA->IDR & GPIO_IDR_ID2) != 0 ? 1 : 0; |
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RTC->TAMPCR |= RTC_TAMPCR_TAMP2E; /* enable tamper */ |
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RTC->TAMPCR |= RTC_TAMPCR_TAMP3E; /* enable tamper */ |
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RTC->WPR = 0; /* enable RTC write protection */ |
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RTC->WPR = 0; |
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} |
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if ( Tamper3Count > 0 ) |
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{ |
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Tamper3Count--; |
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/* check for timeout or whether the user has released the button */ |
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if ( Tamper3Count == 0 || is_t3 ) |
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{ |
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Tamper3Count = 0; |
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RTC->ISR &= ~RTC_ISR_TAMP3F; /* clear tamper flag, allow new tamper event */ |
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} |
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} |
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else |
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{ |
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RTC->ISR &= ~RTC_ISR_TAMP3F; /* clear tamper flag, allow new tamper event */ |
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} |
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if ( Tamper2Count > 0 ) |
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{ |
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Tamper2Count--; |
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/* check for timeout or whether the user has released the button */ |
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if ( Tamper2Count == 0 || is_t2) |
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{ |
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Tamper2Count = 0; |
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RTC->ISR &= ~RTC_ISR_TAMP2F; /* clear tamper flag, allow new tamper event */ |
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} |
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} |
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else |
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{ |
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RTC->ISR &= ~RTC_ISR_TAMP2F; /* clear tamper flag, allow new tamper event */ |
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} |
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ExecuteAlarmSequenceStep(); |
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MenuIdleTimer++; |
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if ( RTCUpdateCount > 0 ) |
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RTCUpdateCount--; |
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} |
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void __attribute__ ((interrupt, used)) RTC_IRQHandler(void) |
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{ |
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//enableRCCRTCWrite(); |
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if ( (EXTI->PR & EXTI_PR_PIF20) != 0 ) /* interrupt caused by wake up */ |
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{ |
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EXTI->PR = EXTI_PR_PIF20; /* wake up is connected to line 20, clear this IRQ */ |
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RTCWUCount++; |
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} |
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/* the wake up time flag must be cleared, otherwise no further IRQ will happen */ |
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/* in principle, this should happen only when a IRQ line 20 IRQ happens, but */ |
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/* it will be more safe to clear this flag for any interrupt */ |
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RTC->ISR &= ~RTC_ISR_WUTF; /* clear the wake up flag */ |
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if ( (EXTI->PR & EXTI_PR_PIF19) != 0 ) /* interrupt caused by tamper event */ |
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{ |
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EXTI->PR = EXTI_PR_PIF19; /* clear tamper IRQ */ |
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/* The TAMPxF flag has to be cleared, but this is done in the systick handler after some delay */ |
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//RTC->ISR &= ~RTC_ISR_TAMP3F; |
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//RTC->ISR &= ~RTC_ISR_TAMP2F; |
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if ( RTC->ISR & RTC_ISR_TAMP3F ) |
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{ |
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if ( isIgnoreNextKey == 0 ) |
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{ |
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key_add(KEY_NEXT); |
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} |
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isIgnoreNextKey = 0; |
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MenuIdleTimer = 0; |
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Tamper3Count = TAMPER_SYSTICK_DELAY; |
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} |
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if ( RTC->ISR & RTC_ISR_TAMP2F ) |
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{ |
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if ( isIgnoreNextKey == 0 ) |
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{ |
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key_add(KEY_SELECT); |
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} |
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isIgnoreNextKey = 0; |
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MenuIdleTimer = 0; |
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Tamper2Count = TAMPER_SYSTICK_DELAY; |
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} |
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} |
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//disableRCCRTCWrite(); |
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RTCIRQCount++; |
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} |
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/*=======================================================================*/ |
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/* |
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Enable several power regions: PWR, GPIOA |
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Enable write access to RTC |
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This must be executed after each reset. |
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*/ |
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void startUp(void) |
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{ |
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RCC->IOPENR |= RCC_IOPENR_IOPAEN; /* Enable clock for GPIO Port A */ |
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RCC->APB1ENR |= RCC_APB1ENR_PWREN; /* enable power interface */ |
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PWR->CR |= PWR_CR_DBP; /* activate write access to RCC->CSR and RTC */ |
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PWR_CSR_Backup = PWR->CSR; /* create a backup of the original PWR_CSR register for later analysis */ |
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PWR->CR |= PWR_CR_CSBF; /* clear the standby flag in the PWR_CSR register, but luckily we have a copy */ |
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PWR->CR |= PWR_CR_CWUF; /* also clear the WUF flag in PWR_CSR */ |
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/* PA0, TAMP2, button input */ |
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GPIOA->MODER &= ~GPIO_MODER_MODE0; /* clear mode for PA0 */ |
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GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD0; /* no pullup/pulldown for PA0 */ |
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GPIOA->PUPDR |= GPIO_PUPDR_PUPD0_0; /* pullup for PA0 */ |
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/* PA2, TAMP3, button input */ |
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GPIOA->MODER &= ~GPIO_MODER_MODE2; /* clear mode for PA2 */ |
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GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD2; /* no pullup/pulldown for PA2 */ |
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GPIOA->PUPDR |= GPIO_PUPDR_PUPD2_0; /* pullup for PA2 */ |
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/* buzzer output */ |
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GPIOA->MODER &= ~GPIO_MODER_MODE6; /* clear mode for PA6 */ |
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GPIOA->MODER |= GPIO_MODER_MODE6_0; /* Output mode for PA6 */ |
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GPIOA->OTYPER &= ~GPIO_OTYPER_OT_6; /* Push/Pull for PA6 */ |
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GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED6; /* low speed for PA6 */ |
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GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD6; /* no pullup/pulldown for PA6 */ |
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GPIOA->BSRR = GPIO_BSRR_BR_6; /* atomic clr PA6 */ |
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} |
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/*=======================================================================*/ |
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/* |
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Set internal high speed clock as clock for the system |
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Also call SystemCoreClockUpdate() |
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This must be executed after each reset. |
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*/ |
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void startHSIClock() |
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{ |
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/* test if the current clock source is something else than HSI */ |
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if ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) |
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{ |
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/* enable HSI */ |
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RCC->CR |= RCC_CR_HSION; |
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/* wait until HSI becomes ready */ |
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while ( (RCC->CR & RCC_CR_HSIRDY) == 0 ) |
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; |
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/* enable the HSI "divide by 4" bit */ |
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RCC->CR |= (uint32_t)(RCC_CR_HSIDIVEN); |
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/* wait until the "divide by 4" flag is enabled */ |
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while((RCC->CR & RCC_CR_HSIDIVF) == 0) |
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; |
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/* then use the HSI clock */ |
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RCC->CFGR = (RCC->CFGR & (uint32_t) (~RCC_CFGR_SW)) | RCC_CFGR_SW_HSI; |
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/* wait until HSI clock is used */ |
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while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) |
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; |
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} |
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/* disable PLL */ |
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RCC->CR &= (uint32_t)(~RCC_CR_PLLON); |
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/* wait until PLL is inactive */ |
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while((RCC->CR & RCC_CR_PLLRDY) != 0) |
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; |
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/* set latency to 1 wait state */ |
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FLASH->ACR |= FLASH_ACR_LATENCY; |
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/* At this point the HSI runs with 4 MHz */ |
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/* Multiply by 16 device by 2 --> 32 MHz */ |
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RCC->CFGR = (RCC->CFGR & (~(RCC_CFGR_PLLMUL| RCC_CFGR_PLLDIV ))) | (RCC_CFGR_PLLMUL16 | RCC_CFGR_PLLDIV2); |
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/* enable PLL */ |
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RCC->CR |= RCC_CR_PLLON; |
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/* wait until the PLL is ready */ |
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while ((RCC->CR & RCC_CR_PLLRDY) == 0) |
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; |
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/* use the PLL has clock source */ |
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RCC->CFGR |= (uint32_t) (RCC_CFGR_SW_PLL); |
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/* wait until the PLL source is active */ |
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while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL) |
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; |
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} |
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/*=======================================================================*/ |
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/* |
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Setup systick interrupt. |
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A call to SystemCoreClockUpdate() is required before calling this function. |
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This must be executed after each reset. |
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*/ |
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void startSysTick(void) |
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{ |
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SysTick->LOAD = (SystemCoreClock/1000)*50 - 1; /* 50ms task */ |
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SysTick->VAL = 0; |
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SysTick->CTRL = 7; /* enable, generate interrupt (SysTick_Handler), do not divide by 2 */ |
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} |
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/*=======================================================================*/ |
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/* |
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Setup u8g2 |
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This must be executed after every reset |
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*/ |
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void initDisplay(uint8_t is_por) |
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{ |
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/* setup display */ |
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u8g2_Setup_ssd1306_i2c_128x64_noname_f(&u8g2, U8G2_R0, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_stm32l0); |
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gui_Init(&u8g2, is_por); |
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u8g2_SetFlipMode(&u8g2, 1); |
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} |
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/*=======================================================================*/ |
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/* |
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configure and start RTC |
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This must be executed only after POR reset. |
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write access must be activated before calling this function: PWR->CR |= PWR_CR_DBP; |
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return values: |
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0: no clock avilable |
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1: external clock |
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2: external oszillator |
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*/ |
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unsigned int initRTC(void) |
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{ |
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unsigned int r = 0; |
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/* real time clock enable */ |
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//enableRCCRTCWrite(); |
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__disable_irq(); |
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RTC->WPR = 0x0ca; /* disable RTC write protection */ |
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RTC->WPR = 0x053; |
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/* try externel 32K clock source */ |
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RCC->CSR |= RCC_CSR_LSEBYP; /* bypass oscillator */ |
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RCC->CSR |= RCC_CSR_LSEON; /* enable low speed external clock */ |
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delay_micro_seconds(100000*5); /* LSE requires between 100ms to 200ms */ |
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if ( RCC->CSR & RCC_CSR_LSERDY ) |
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{ |
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r = 1; |
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} |
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else |
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{ |
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RCC->CSR &= ~RCC_CSR_LSEON; /* disable external clock */ |
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/* try externel 32K oscillator */ |
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RCC->CSR &= ~RCC_CSR_LSEBYP; /* no bypass oscillator */ |
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RCC->CSR &= ~RCC_CSR_LSEDRV_Msk; /* lowest drive */ |
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RCC->CSR |= RCC_CSR_LSEDRV_0; /* medium low drive */ |
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RCC->CSR |= RCC_CSR_LSEON; /* enable low speed external clock */ |
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delay_micro_seconds(100000*6); /* LSE requires between 200ms and 400ms */ |
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if ( RCC->CSR & RCC_CSR_LSERDY ) |
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{ |
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r = 2; |
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} |
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} |
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if ( r > 0 ) |
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{ |
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RCC->CSR &= ~RCC_CSR_RTCSEL_Msk; /* no clock selection for RTC */ |
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RCC->CSR |= RCC_CSR_RTCSEL_LSE; /* select LSE */ |
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RCC->CSR |= RCC_CSR_RTCEN; /* enable RTC */ |
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RTC->ISR = RTC_ISR_INIT; /* request RTC stop */ |
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while((RTC->ISR & RTC_ISR_INITF)!=RTC_ISR_INITF) /* wait for stop */ |
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; |
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RTC->PRER = 0x07f00ff; /* 1 Hz clock */ |
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RTC->TR = 0; |
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RTC->ISR =~ RTC_ISR_INIT; /* start RTC */ |
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} |
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RTC->WPR = 0; /* enable RTC write protection */ |
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RTC->WPR = 0; |
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__enable_irq(); |
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return r; |
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} |
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/*=======================================================================*/ |
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/* |
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enable RTC wakeup and interrupt |
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This must be executed after any reset. |
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*/ |
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void startRTCWakeUp(void) |
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{ |
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/* wake up time setup & start */ |
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__disable_irq(); |
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RTC->WPR = 0x0ca; /* disable RTC write protection */ |
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RTC->WPR = 0x053; |
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RTC->CR &=~ RTC_CR_WUTE; /* disable wakeup timer for reprogramming */ |
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while((RTC->ISR & RTC_ISR_WUTWF) != RTC_ISR_WUTWF) |
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; |
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RTC->WUTR = WAKEUP_PERIOD; /* wakeup time */ |
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//RTC->WUTR = 0; /* reload is 1: 1Hz with the 1Hz clock */ |
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RTC->CR &= ~RTC_CR_WUCKSEL; /* clear selection register */ |
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RTC->CR |= RTC_CR_WUCKSEL_2; /* select the 1Hz clock */ |
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RTC->CR |= RTC_CR_WUTE | RTC_CR_WUTIE ; |
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/* clear all the detection flags, not 100% sure whether this is required */ |
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RTC->ISR &= ~RTC_ISR_WUTF; |
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RTC->ISR &= ~RTC_ISR_TAMP2F; |
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RTC->ISR &= ~RTC_ISR_TAMP3F; |
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/* tamper (button) detection */ |
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/* low level, filtered, pullup enabled, IRQ enabled, Sample Freq is 128Hz */ |
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RTC->TAMPCR = |
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RTC_TAMPCR_TAMP3NOERASE | RTC_TAMPCR_TAMP3IE | RTC_TAMPCR_TAMP3E | |
|
RTC_TAMPCR_TAMP2NOERASE | RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP2E | |
|
RTC_TAMPCR_TAMPPRCH_0 | RTC_TAMPCR_TAMPFLT_1 | RTC_TAMPCR_TAMPFREQ; |
|
|
|
|
|
// RTC_TAMPCR_TAMPPUDIS |
|
|
|
/* wake up IRQ is connected to line 20 */ |
|
EXTI->RTSR |= EXTI_RTSR_RT20; /* rising edge for wake up line */ |
|
EXTI->IMR |= EXTI_IMR_IM20; /* interrupt enable */ |
|
|
|
/* tamper IRQ is connected to line 19 */ |
|
EXTI->RTSR |= EXTI_RTSR_RT19; /* rising edge for tamper*/ |
|
EXTI->IMR |= EXTI_IMR_IM19; /* interrupt enable */ |
|
|
|
RTC->WPR = 0; /* disable RTC write protection */ |
|
RTC->WPR = 0; |
|
__enable_irq(); |
|
} |
|
|
|
/* read values from RTC and store the values into the gui_data struct */ |
|
void readRTC(void) |
|
{ |
|
uint32_t r; |
|
int i; |
|
uint8_t bcd[12]; |
|
|
|
r = RTC->TR; |
|
|
|
i = 0; |
|
do |
|
{ |
|
bcd[i] = r & 15; |
|
r >>= 4; |
|
i++; |
|
} while( i < 6 ); |
|
|
|
bcd[1] &= 7; /* seconds */ |
|
bcd[3] &= 7; /* minutes */ |
|
bcd[5] &= 3; /* hours */ |
|
|
|
gui_data.h = bcd[4] + bcd[5]*10;; |
|
gui_data.mt = bcd[3]; |
|
gui_data.mo = bcd[2]; |
|
gui_data.st = bcd[1]; |
|
gui_data.so = bcd[0]; |
|
|
|
|
|
r = RTC->DR; |
|
i = 0; |
|
do |
|
{ |
|
bcd[i] = r & 15; |
|
r >>= 4; |
|
i++; |
|
} while( i < 6 ); |
|
|
|
bcd[1] &= 3; /* days */ |
|
bcd[3] &= 1; /* months */ |
|
|
|
gui_data.day = bcd[0] + bcd[1]*10; |
|
gui_data.month = bcd[2] + bcd[3]*10; |
|
gui_data.year_o = bcd[4]; |
|
gui_data.year_t = bcd[5]; |
|
|
|
|
|
gui_date_adjust(); /* calculate weekday */ |
|
//gui_Recalculate(); /* this will also store the values back in the backup registers */ |
|
} |
|
|
|
void enterStandByMode(void) |
|
{ |
|
MenuIdleTimer = 0; |
|
|
|
if ( DisplayStandbyMode == DISPLAY_STANDBY_MODE_REDUCED ) |
|
u8g2_SetContrast(&u8g2, DISPLAY_CONTRAST_REDUCED); |
|
|
|
if ( DisplayStandbyMode == DISPLAY_STANDBY_MODE_OFF ) |
|
u8g2_SetPowerSave(&u8g2, 1); |
|
|
|
|
|
SetAlarmSequence(NULL); |
|
GPIOA->MODER &= ~GPIO_MODER_MODE6; /* clear mode for PA6 --> input */ |
|
|
|
PWR->CR |= PWR_CR_PDDS; /* Power Down Deepsleep */ |
|
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; /* set the cortex M0+ deep sleep flag */ |
|
__DSB(); /* finish memory access */ |
|
__WFI(); /* enter deep sleep */ |
|
__NOP(); |
|
} |
|
|
|
/* |
|
ch 0..15: GPIO |
|
ch 16: ??? |
|
ch 17: vref (bandgap) |
|
ch18: temperature sensor |
|
|
|
returns 12 bit result, right aligned |
|
*/ |
|
uint16_t readADC(uint8_t ch) |
|
{ |
|
uint32_t data; |
|
uint32_t i; |
|
|
|
__disable_irq(); |
|
|
|
/* ADC RESET */ |
|
|
|
RCC->APB2ENR |= RCC_APB2ENR_ADCEN; /* enable ADC clock */ |
|
__NOP(); /* let us wait for some time */ |
|
__NOP(); /* let us wait for some time */ |
|
RCC->APB2RSTR |= RCC_APB2RSTR_ADCRST; |
|
__NOP(); /* let us wait for some time */ |
|
__NOP(); /* let us wait for some time */ |
|
RCC->APB2RSTR &= ~RCC_APB2RSTR_ADCRST; |
|
__NOP(); /* let us wait for some time */ |
|
__NOP(); /* let us wait for some time */ |
|
|
|
|
|
/* Enable some basic parts */ |
|
|
|
ADC1->IER = 0; /* do not allow any interrupts */ |
|
ADC1->CFGR2 &= ~ADC_CFGR2_CKMODE; /* select HSI16 clock */ |
|
|
|
ADC1->CR |= ADC_CR_ADVREGEN; /* enable ADC voltage regulator, probably not required, because this is automatically activated */ |
|
ADC->CCR |= ADC_CCR_VREFEN; /* Wake-up the VREFINT */ |
|
ADC->CCR |= ADC_CCR_TSEN; /* Wake-up the temperature sensor */ |
|
|
|
__NOP(); /* let us wait for some time */ |
|
__NOP(); /* let us wait for some time */ |
|
|
|
/* CALIBRATION */ |
|
|
|
if ((ADC1->CR & ADC_CR_ADEN) != 0) /* clear ADEN flag if required */ |
|
{ |
|
ADC1->CR &= (uint32_t)(~ADC_CR_ADEN); |
|
} |
|
ADC1->CR |= ADC_CR_ADCAL; /* start calibration */ |
|
while ((ADC1->ISR & ADC_ISR_EOCAL) == 0) /* wait for clibration finished */ |
|
{ |
|
} |
|
ADC1->ISR |= ADC_ISR_EOCAL; /* clear the status flag, by writing 1 to it */ |
|
__NOP(); /* not sure why, but some nop's are required here, at least 4 of them */ |
|
__NOP(); |
|
__NOP(); |
|
__NOP(); |
|
__NOP(); |
|
__NOP(); |
|
|
|
/* ENABLE ADC */ |
|
|
|
ADC1->ISR |= ADC_ISR_ADRDY; /* clear ready flag */ |
|
ADC1->CR |= ADC_CR_ADEN; /* enable ADC */ |
|
while ((ADC1->ISR & ADC_ISR_ADRDY) == 0) /* wait for ADC */ |
|
{ |
|
} |
|
|
|
//printBits(5, ADC1->ISR ); |
|
//printBits(6, ADC1->CR ); |
|
|
|
/* CONFIGURE ADC */ |
|
|
|
ADC1->CFGR1 &= ~ADC_CFGR1_EXTEN; /* software enabled conversion start */ |
|
ADC1->CFGR1 &= ~ADC_CFGR1_ALIGN; /* right alignment */ |
|
ADC1->CFGR1 &= ~ADC_CFGR1_RES; /* 12 bit resolution */ |
|
ADC1->CHSELR = 1<<ch; /* Select channel */ |
|
ADC1->SMPR |= ADC_SMPR_SMP_0 | ADC_SMPR_SMP_1 | ADC_SMPR_SMP_2; /* Select a sampling mode of 111 (very slow)*/ |
|
|
|
/* DO CONVERSION */ |
|
|
|
data = 0; |
|
for( i = 0; i < 8; i++ ) |
|
{ |
|
|
|
ADC1->CR |= ADC_CR_ADSTART; /* start the ADC conversion */ |
|
while ((ADC1->ISR & ADC_ISR_EOC) == 0) /* wait end of conversion */ |
|
{ |
|
} |
|
data += ADC1->DR; /* get ADC result and clear the ISR_EOC flag */ |
|
} |
|
data >>= 3; |
|
|
|
/* DISABLE ADC */ |
|
|
|
/* at this point the end of sampling and end of sequence bits are also set in ISR registr */ |
|
if ( (ADC1->CR & ADC_CR_ADEN) != 0 ) |
|
{ |
|
ADC1->CR |= ADC_CR_ADDIS; /* disable ADC... maybe better execute a reset */ |
|
while ((ADC1->CR & ADC_CR_ADEN) != 0) /* wait for ADC disable, ADEN is also cleared */ |
|
{ |
|
} |
|
} |
|
|
|
/* DISABLE OTHER PARTS, INCLUDING CLOCK */ |
|
|
|
ADC->CCR &= ~ADC_CCR_VREFEN; /* disable VREFINT */ |
|
ADC->CCR &= ~ADC_CCR_TSEN; /* disable temperature sensor */ |
|
ADC1->CR &= ~ADC_CR_ADVREGEN; /* disable ADC voltage regulator */ |
|
RCC->APB2ENR &= ~RCC_APB2ENR_ADCEN; /* disable ADC clock */ |
|
|
|
__enable_irq(); |
|
return data; |
|
} |
|
|
|
uint16_t getTemperature(void) |
|
{ |
|
int16_t y1, y2,x1, x2, t; |
|
int16_t y; |
|
|
|
|
|
y1 = 30; |
|
x1 = *(uint16_t *)(0x1FF8007A); // 30 degree with 3.0V |
|
x1 *=30; |
|
x1 /=33; |
|
y2 = 110; // AN3964: 110 degree, Datasheet: 130 degree |
|
x2 = *(uint16_t *)(0x1FF8007E); // 130 degree with 3.0V |
|
x2 *=30; |
|
x2 /=33; |
|
t = readADC(18); |
|
|
|
y = ( (y2 - y1) * ( t - x1) ) / (x2 - x1) + y1; |
|
|
|
return y; |
|
} |
|
|
|
uint8_t getBatteryLevels(uint16_t adc, uint16_t cnt) |
|
{ |
|
uint16_t levels; |
|
if ( adc < 1233 ) |
|
return 0; |
|
adc -= 1233; |
|
|
|
levels = (adc*cnt)/(4096-1223); |
|
return levels; |
|
} |
|
|
|
void drawBatSymbol(uint16_t adc) |
|
{ |
|
u8g2_uint_t w, levels; |
|
w = u8g2_GetDisplayWidth(&u8g2); |
|
u8g2_DrawHLine(&u8g2, w-5, 0, 2); |
|
u8g2_DrawFrame(&u8g2, w-7, 1, 6, 9); |
|
levels = getBatteryLevels(adc, 8); |
|
while( levels > 0 ) |
|
{ |
|
|
|
u8g2_DrawHLine(&u8g2, w-6, 9-levels, 4); |
|
levels--; |
|
} |
|
} |
|
|
|
|
|
/*=======================================================================*/ |
|
int main() |
|
{ |
|
int i; |
|
uint16_t adc; |
|
startHSIClock(); /* Increase system clock, must be executed after each reset */ |
|
SystemCoreClockUpdate(); /* Update variable SystemCoreClock, must be executed after each reset */ |
|
startUp(); /* basic system setup + make a backup of PWR_CSR (PWR_CSR_Backup), must be executed after each reset */ |
|
startSysTick(); /* start the sys tick interrupt, must be executed after each reset */ |
|
adjustDST(DST_RULE); /* adjust DST... ok,this is only done after reset, hopefully this is often enough. This must be called before readRTC() */ |
|
|
|
|
|
/* LED output line */ |
|
GPIOA->MODER &= ~GPIO_MODER_MODE13; /* clear mode for PA13 */ |
|
GPIOA->MODER |= GPIO_MODER_MODE13_0; /* Output mode for PA13 */ |
|
GPIOA->OTYPER &= ~GPIO_OTYPER_OT_13; /* Push/Pull for PA13 */ |
|
GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED13; /* low speed for PA13 */ |
|
GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD13; /* no pullup/pulldown for PA13 */ |
|
GPIOA->BSRR = GPIO_BSRR_BR_13; /* atomic clr PA13 */ |
|
GPIOA->BSRR = GPIO_BSRR_BS_13; /* atomic set PA13 */ |
|
|
|
|
|
/* the lowest two bits of the PWR_CSR reg indicate wake up from standby (bit 1) and WUF als source (bit 0) */ |
|
/* both bits are 0 for POR and button reset, both bits are 1 for a wakeup reset */ |
|
/* bits | root cause */ |
|
/* 00 | POR or NVIC --> perform full setup */ |
|
/* 11 | Standby + WUF --> continue with main screen */ |
|
/* 01 | NVIC-Reset --> perform full setup */ |
|
/* we check bit 1 only */ |
|
|
|
switch(PWR_CSR_Backup & 3) |
|
{ |
|
case 0: /* Power on reset */ |
|
ResetReason = RESET_REASON_POR; |
|
break; |
|
case 1: /* reset by NVIC_SystemReset() */ |
|
ResetReason = RESET_REASON_NVIC_RESET; |
|
break; |
|
default: /* probably a reset caused by RTC */ |
|
/* analyse RTC_ISR register */ |
|
if ( RTC->ISR & RTC_ISR_TAMP2F ) |
|
ResetReason = RESET_REASON_TAMP2; |
|
else if ( RTC->ISR & RTC_ISR_TAMP3F ) |
|
ResetReason = RESET_REASON_TAMP3; |
|
else |
|
ResetReason = RESET_REASON_WUF; |
|
break; |
|
} |
|
|
|
if ( ResetReason == RESET_REASON_POR || ResetReason == RESET_REASON_NVIC_RESET ) |
|
{ |
|
unsigned int r; |
|
/* Power on reset */ |
|
r = initRTC(); |
|
readRTC(); |
|
initDisplay(1); /* init display assumes proper values in gui_data */ |
|
if ( r == 0 ) |
|
{ |
|
u8g2_ClearBuffer(&u8g2); |
|
u8g2_SetFont(&u8g2, MENU_NORMAL_FONT); |
|
u8g2_DrawStr(&u8g2, 0, 15, "No RTC Clock"); |
|
u8g2_SendBuffer(&u8g2); |
|
delay_micro_seconds(3000000); |
|
do_reset(); |
|
} |
|
|
|
/*set a alarm time for testing */ |
|
//gui_alarm_list[0].enable = 1; |
|
//gui_alarm_list[0].m = 1; |
|
//gui_alarm_list[0].wd[5] = 1; |
|
|
|
gui_Recalculate(); |
|
|
|
} |
|
else |
|
{ |
|
/* Reset caused by wakeup */ |
|
|
|
/* we probably have to clear the RTC detection flags for WUF and TAMPER */ |
|
/* this is done later in startRTCWakeUp() */ |
|
|
|
readRTC(); |
|
|
|
/* do a warm start of the display, this means that the display reset is skipped and the init sequence is not sent */ |
|
initDisplay(0); /* init display assumes proper values in gui_data, additionally the alarm flag might be set here */ |
|
} |
|
|
|
|
|
if ( DisplayStandbyMode != DISPLAY_STANDYB_MODE_ALWAYS_ON ) |
|
{ |
|
/* before the RTC is enabled via startRTCWakeUp(), avoid key detection if we are in any other mode than ALWAYS_ON */ |
|
if ( ResetReason == RESET_REASON_TAMP2 || ResetReason == RESET_REASON_TAMP3 ) |
|
isIgnoreNextKey = 1; |
|
} |
|
|
|
startRTCWakeUp(); /* setup wakeup and temper, enable RTC IRQ, probably required after each reset */ |
|
|
|
NVIC_SetPriority(RTC_IRQn, 0); |
|
NVIC_EnableIRQ(RTC_IRQn); |
|
|
|
|
|
if ( ResetReason == RESET_REASON_WUF && gui_data.is_alarm == 0 ) |
|
{ |
|
/* update current time */ |
|
u8g2_ClearBuffer(&u8g2); |
|
GPIOA->BSRR = GPIO_BSRR_BR_13; /* atomic set PA13 */ |
|
gui_Draw(); |
|
|
|
GPIOA->BSRR = GPIO_BSRR_BS_13; /* atomic clr PA13 */ |
|
u8g2_SendBuffer(&u8g2); |
|
/* go back to sleep mode */ |
|
enterStandByMode(); |
|
} |
|
|
|
/* turn on display now */ |
|
u8g2_SetPowerSave(&u8g2, 0); /* not required for the ALWAYS_ON mode, but does not matter in the other modes */ |
|
//u8g2_SetContrast(&u8g2, DISPLAY_CONTRAST_NORMAL); |
|
set_contrast(); |
|
|
|
/* get current voltage level of the battery */ |
|
adc = readADC(5); |
|
|
|
|
|
|
|
/* start user loop */ |
|
for(;;) |
|
{ |
|
if ( RTCUpdateCount == 0 ) |
|
{ |
|
if ( gui_menu.me_list == melist_display_time ) |
|
{ |
|
readRTC(); |
|
gui_SignalTimeChange(); |
|
} |
|
else |
|
{ |
|
//readRTC(); |
|
//gui_Recalculate(); |
|
} |
|
|
|
|
|
RTCUpdateCount = 10; // update every 10 systicks (half second) |
|
} |
|
|
|
|
|
for(;;) |
|
{ |
|
i = key_get(); |
|
if ( i == KEY_NONE ) |
|
break; |
|
if ( i == KEY_SELECT ) |
|
gui_Select(); |
|
if ( i == KEY_NEXT ) |
|
gui_Next(); |
|
} |
|
|
|
u8g2_ClearBuffer(&u8g2); |
|
GPIOA->BSRR = GPIO_BSRR_BR_13; /* atomic set PA13 */ |
|
gui_Draw(); |
|
if ( gui_menu.me_list == melist_display_time ) |
|
{ |
|
u8g2_SetFont(&u8g2, MENU_NORMAL_FONT); |
|
if ( gui_data.display_voltage ) |
|
u8g2_DrawStr(&u8g2, 0, 8, u8x8_u16toa((adc*330UL)>>12, 3)); |
|
drawBatSymbol(adc); |
|
} |
|
GPIOA->BSRR = GPIO_BSRR_BS_13; /* atomic clr PA13 */ |
|
u8g2_SendBuffer(&u8g2); |
|
|
|
|
|
|
|
if ( MenuIdleTimer > MENU_IDLE_SYSTICK_TIMEOUT ) |
|
{ |
|
if ( gui_data.is_equal == 0 ) // idea is, that the alarm does not go off during the alarm to avoid another alarm in the same minute |
|
{ |
|
if ( gui_menu.me_list != melist_display_time ) |
|
{ |
|
/* jump back to the display menu and redraw the time. not sure if this is required */ |
|
menu_SetMEList(&gui_menu, melist_display_time, 0); |
|
readRTC(); |
|
gui_SignalTimeChange(); |
|
u8g2_ClearBuffer(&u8g2); |
|
gui_Draw(); |
|
u8g2_SetFont(&u8g2, MENU_NORMAL_FONT); |
|
u8g2_DrawStr(&u8g2, 0, 8, u8x8_u16toa((adc*330UL)>>12, 3)); |
|
drawBatSymbol(adc); |
|
u8g2_SendBuffer(&u8g2); |
|
} |
|
|
|
/* stop everything except RTC */ |
|
enterStandByMode(); |
|
} |
|
else |
|
{ |
|
/* read and recalculate so that the gui_data.is_equal is updated */ |
|
readRTC(); |
|
gui_Recalculate(); |
|
} |
|
} |
|
|
|
__DSB(); /* finish memory access */ |
|
__WFI(); /* enter sleep */ |
|
__NOP(); |
|
|
|
|
|
} |
|
|
|
|
|
|
|
}
|
|
|