use google code style
This commit is contained in:
parent
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commit
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@ -1,11 +1,11 @@
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---
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Language: Cpp
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# BasedOnStyle: LLVM
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AccessModifierOffset: -2
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# BasedOnStyle: Google
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AccessModifierOffset: -1
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AlignAfterOpenBracket: Align
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AlignConsecutiveAssignments: true
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AlignConsecutiveDeclarations: true
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AlignEscapedNewlines: Right
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AlignEscapedNewlines: Left
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AlignOperands: true
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AlignTrailingComments: true
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AllowAllParametersOfDeclarationOnNextLine: true
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@ -13,13 +13,13 @@ AllowShortBlocksOnASingleLine: false
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AllowShortCaseLabelsOnASingleLine: true
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AllowShortFunctionsOnASingleLine: All
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AllowShortIfStatementsOnASingleLine: true
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AllowShortLoopsOnASingleLine: false
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AllowShortLoopsOnASingleLine: true
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AlwaysBreakAfterDefinitionReturnType: None
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AlwaysBreakAfterReturnType: None
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AlwaysBreakBeforeMultilineStrings: false
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AlwaysBreakTemplateDeclarations: MultiLine
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BinPackArguments: false
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BinPackParameters: false
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AlwaysBreakBeforeMultilineStrings: true
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AlwaysBreakTemplateDeclarations: Yes
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BinPackArguments: true
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BinPackParameters: true
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BraceWrapping:
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AfterClass: false
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AfterControlStatement: false
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@ -45,14 +45,14 @@ BreakConstructorInitializersBeforeComma: false
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BreakConstructorInitializers: BeforeColon
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BreakAfterJavaFieldAnnotations: false
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BreakStringLiterals: true
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ColumnLimit: 120
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ColumnLimit: 80
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CommentPragmas: '^ IWYU pragma:'
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CompactNamespaces: false
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ConstructorInitializerAllOnOneLineOrOnePerLine: false
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ConstructorInitializerAllOnOneLineOrOnePerLine: true
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ConstructorInitializerIndentWidth: 4
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ContinuationIndentWidth: 4
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Cpp11BracedListStyle: true
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DerivePointerAlignment: false
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DerivePointerAlignment: true
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DisableFormat: false
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ExperimentalAutoDetectBinPacking: false
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FixNamespaceComments: true
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@ -62,25 +62,27 @@ ForEachMacros:
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- BOOST_FOREACH
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IncludeBlocks: Preserve
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IncludeCategories:
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- Regex: '^"(llvm|llvm-c|clang|clang-c)/'
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- Regex: '^<ext/.*\.h>'
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Priority: 2
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- Regex: '^(<|"(gtest|gmock|isl|json)/)'
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Priority: 3
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- Regex: '.*'
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- Regex: '^<.*\.h>'
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Priority: 1
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IncludeIsMainRegex: '(Test)?$'
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IndentCaseLabels: false
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- Regex: '^<.*'
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Priority: 2
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- Regex: '.*'
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Priority: 3
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IncludeIsMainRegex: '([-_](test|unittest))?$'
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IndentCaseLabels: true
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IndentPPDirectives: None
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IndentWidth: 2
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IndentWrappedFunctionNames: false
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JavaScriptQuotes: Leave
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JavaScriptWrapImports: true
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KeepEmptyLinesAtTheStartOfBlocks: true
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KeepEmptyLinesAtTheStartOfBlocks: false
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MacroBlockBegin: ''
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MacroBlockEnd: ''
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MaxEmptyLinesToKeep: 1
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NamespaceIndentation: None
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ObjCBinPackProtocolList: Auto
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ObjCBinPackProtocolList: Never
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ObjCBlockIndentWidth: 2
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ObjCSpaceAfterProperty: false
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ObjCSpaceBeforeProtocolList: true
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@ -91,8 +93,36 @@ PenaltyBreakFirstLessLess: 120
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PenaltyBreakString: 1000
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PenaltyBreakTemplateDeclaration: 10
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PenaltyExcessCharacter: 1000000
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PenaltyReturnTypeOnItsOwnLine: 60
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PointerAlignment: Right
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PenaltyReturnTypeOnItsOwnLine: 200
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PointerAlignment: Left
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RawStringFormats:
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- Language: Cpp
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Delimiters:
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- cc
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- CC
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- cpp
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- Cpp
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- CPP
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- 'c++'
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- 'C++'
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CanonicalDelimiter: ''
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BasedOnStyle: google
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- Language: TextProto
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Delimiters:
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- pb
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- PB
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- proto
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- PROTO
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EnclosingFunctions:
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- EqualsProto
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- EquivToProto
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- PARSE_PARTIAL_TEXT_PROTO
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- PARSE_TEST_PROTO
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- PARSE_TEXT_PROTO
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- ParseTextOrDie
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- ParseTextProtoOrDie
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CanonicalDelimiter: ''
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BasedOnStyle: google
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ReflowComments: true
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SortIncludes: true
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SortUsingDeclarations: true
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@ -105,13 +135,13 @@ SpaceBeforeInheritanceColon: true
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SpaceBeforeParens: ControlStatements
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SpaceBeforeRangeBasedForLoopColon: true
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SpaceInEmptyParentheses: false
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SpacesBeforeTrailingComments: 1
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SpacesBeforeTrailingComments: 2
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SpacesInAngles: false
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SpacesInContainerLiterals: true
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SpacesInCStyleCastParentheses: false
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SpacesInParentheses: false
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SpacesInSquareBrackets: false
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Standard: Cpp11
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Standard: Auto
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TabWidth: 8
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UseTab: Never
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...
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@ -18,7 +18,7 @@ sx127x_config_t sx127x_config_default() {
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}
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static esp_err_t sx127x_write_config(sx127x_t *handle) {
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esp_err_t ret;
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esp_err_t ret;
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const sx127x_config_t *config = &handle->config;
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ret = sx127x_sleep(handle);
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@ -35,7 +35,7 @@ static esp_err_t sx127x_write_config(sx127x_t *handle) {
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uint8_t reg_lna;
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ret = sx127x_read_register(handle, REG_LNA, ®_lna);
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SX127X_ERROR_CHECK(ret);
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reg_lna |= 0x03; // set LNA boost
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reg_lna |= 0x03; // set LNA boost
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ret = sx127x_write_register(handle, REG_LNA, reg_lna);
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SX127X_ERROR_CHECK(ret);
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@ -99,7 +99,7 @@ esp_err_t sx127x_init(const sx127x_config_t *config, sx127x_t **handle_ptr) {
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.duty_cycle_pos = 0,
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.cs_ena_pretrans = 0,
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.cs_ena_posttrans = 0,
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.clock_speed_hz = SPI_CLOCK_HZ, // 8mhz
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.clock_speed_hz = SPI_CLOCK_HZ, // 8mhz
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.input_delay_ns = 0,
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.spics_io_num = config->cs_io_num,
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.flags = 0,
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@ -107,14 +107,16 @@ esp_err_t sx127x_init(const sx127x_config_t *config, sx127x_t **handle_ptr) {
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.pre_cb = NULL,
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.post_cb = NULL,
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};
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ret = spi_bus_add_device(config->spi_host, &device_config, &handle->device_handle);
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ret = spi_bus_add_device(config->spi_host, &device_config,
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&handle->device_handle);
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SX127X_ERROR_CHECK2(ret, spi_bus_add_device)
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// read version and check that it is compatible
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uint8_t version;
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ret = sx127x_read_register(handle, REG_VERSION, &version);
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SX127X_ERROR_CHECK2(ret, sx127x_read_register);
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SX127X_CHECK(version == 0x12, "unsupported version %#x", ESP_ERR_INVALID_VERSION, version);
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SX127X_CHECK(version == 0x12, "unsupported version %#x",
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ESP_ERR_INVALID_VERSION, version);
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ret = sx127x_write_config(handle);
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SX127X_ERROR_CHECK(ret);
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@ -152,10 +154,10 @@ void sx127x_isr(void *arg) {
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}
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}
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#define _TX_CHECK(_ret) \
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ret = (_ret); \
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if (ret != ESP_OK) { \
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goto error; \
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#define _TX_CHECK(_ret) \
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ret = (_ret); \
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if (ret != ESP_OK) { \
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goto error; \
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}
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void sx127x_do_tx(sx127x_t *handle, sx127x_packet_t *packet) {
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@ -167,7 +169,7 @@ void sx127x_do_tx(sx127x_t *handle, sx127x_packet_t *packet) {
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if (mode != SX127X_MODE_TX && mode != SX127X_MODE_FS_TX) {
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break;
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}
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vTaskDelay(1); // wait for finish transmitting
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vTaskDelay(1); // wait for finish transmitting
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}
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_TX_CHECK(sx127x_standby(handle));
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@ -179,23 +181,26 @@ void sx127x_do_tx(sx127x_t *handle, sx127x_packet_t *packet) {
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}
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_TX_CHECK(sx127x_read_register(handle, REG_MODEM_CONFIG_2, &config_2));
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config_2 &= ~0x01; // set explicit header mode TODO: implicit header?
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config_2 &= ~0x01; // set explicit header mode TODO: implicit header?
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_TX_CHECK(sx127x_write_register(handle, REG_MODEM_CONFIG_2, config_2));
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_TX_CHECK(sx127x_write_register(handle, REG_FIFO_ADDR_PTR, 0));
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_TX_CHECK(sx127x_write_register(handle, REG_PAYLOAD_LENGTH, 0));
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_TX_CHECK(sx127x_write_fifo(handle, packet->data, packet->data_len));
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_TX_CHECK(sx127x_write_register(handle, REG_PAYLOAD_LENGTH, packet->data_len));
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_TX_CHECK(
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sx127x_write_register(handle, REG_PAYLOAD_LENGTH, packet->data_len));
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_TX_CHECK(sx127x_write_register(handle, REG_OP_MODE, SX127X_LONG_RANGE | SX127X_MODE_FS_TX));
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_TX_CHECK(sx127x_write_register(handle, REG_OP_MODE,
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SX127X_LONG_RANGE | SX127X_MODE_FS_TX));
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vTaskDelay(pdMS_TO_TICKS(1));
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_TX_CHECK(sx127x_write_register(handle, REG_OP_MODE, SX127X_LONG_RANGE | SX127X_MODE_TX));
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_TX_CHECK(sx127x_write_register(handle, REG_OP_MODE,
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SX127X_LONG_RANGE | SX127X_MODE_TX));
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// wait for transmission to finish
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while (true) {
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_TX_CHECK(sx127x_read_register(handle, REG_IRQ_FLAGS, &irq_flags));
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if (irq_flags & IRQ_TX_DONE_MASK) { // if the transmission is done
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if (irq_flags & IRQ_TX_DONE_MASK) { // if the transmission is done
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break;
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}
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vTaskDelay(1);
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@ -209,7 +214,8 @@ error:
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ESP_LOGE(SX127X_TAG, "tx error: %s (%d)", error_name, ret);
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}
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// go back to rx mode
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sx127x_write_register(handle, REG_OP_MODE, SX127X_LONG_RANGE | SX127X_MODE_RX_CONT);
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sx127x_write_register(handle, REG_OP_MODE,
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SX127X_LONG_RANGE | SX127X_MODE_RX_CONT);
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}
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void sx127x_task(void *arg) {
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@ -239,13 +245,14 @@ void sx127x_task(void *arg) {
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}
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ESP_LOGI(SX127X_TAG, "sx127x_task exiting");
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handle->task_state = SX127X_TASK_STOPPED;
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vTaskDelete(NULL); // must delete own task
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vTaskDelete(NULL); // must delete own task
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}
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esp_err_t sx127x_start(sx127x_t *handle) {
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esp_err_t ret;
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SX127X_CHECK(handle->task_handle == NULL, "task already running", ESP_ERR_INVALID_STATE);
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SX127X_CHECK(handle->task_handle == NULL, "task already running",
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ESP_ERR_INVALID_STATE);
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handle->intr_semaphore = xSemaphoreCreateBinary();
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// handle->recv_packet_queue = xQueueCreate(8, 10);
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@ -253,7 +260,8 @@ esp_err_t sx127x_start(sx127x_t *handle) {
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handle->task_state = SX127X_TASK_RUNNING;
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BaseType_t pdRet =
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xTaskCreate(sx127x_task, "sx127x_task", TASK_STACK_SIZE, (void *)handle, TASK_PRIORITY, &handle->task_handle);
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xTaskCreate(sx127x_task, "sx127x_task", TASK_STACK_SIZE, (void *)handle,
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TASK_PRIORITY, &handle->task_handle);
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SX127X_CHECK(pdRet == pdPASS, "failed to create task", ESP_FAIL);
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ret = sx127x_write_register(handle, REG_DIO_MAPPING_1, 0x00);
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@ -270,7 +278,8 @@ esp_err_t sx127x_start(sx127x_t *handle) {
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ret = gpio_install_isr_service(ESP_INTR_FLAG_LEVEL1);
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SX127X_ERROR_CHECK2(ret, gpio_install_isr_service);
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ret = gpio_isr_handler_add(handle->config.irq_io_num, sx127x_isr, (void *)handle);
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ret = gpio_isr_handler_add(handle->config.irq_io_num, sx127x_isr,
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(void *)handle);
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SX127X_ERROR_CHECK2(ret, gpio_isr_handler_add);
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return ESP_OK;
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@ -279,7 +288,8 @@ esp_err_t sx127x_start(sx127x_t *handle) {
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esp_err_t sx127x_stop(sx127x_t *handle) {
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esp_err_t ret;
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SX127X_CHECK(handle->task_handle != NULL, "task has not been started", ESP_ERR_INVALID_STATE);
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SX127X_CHECK(handle->task_handle != NULL, "task has not been started",
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ESP_ERR_INVALID_STATE);
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handle->task_state = SX127X_TASK_STOPPING;
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xTaskNotifyGive(handle->task_handle);
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@ -295,15 +305,19 @@ esp_err_t sx127x_stop(sx127x_t *handle) {
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return ESP_OK;
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}
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esp_err_t sx127x_send_packet(sx127x_t *handle, const char *data, size_t data_len, TickType_t ticks_to_wait) {
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SX127X_CHECK(handle->task_state == SX127X_TASK_RUNNING, "task not running", ESP_FAIL);
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SX127X_CHECK(data_len < SX127_MAX_PACKET_LEN, "packet len too long: %d", ESP_FAIL, data_len);
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esp_err_t sx127x_send_packet(sx127x_t *handle, const char *data,
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size_t data_len, TickType_t ticks_to_wait) {
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SX127X_CHECK(handle->task_state == SX127X_TASK_RUNNING, "task not running",
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ESP_FAIL);
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SX127X_CHECK(data_len < SX127_MAX_PACKET_LEN, "packet len too long: %d",
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ESP_FAIL, data_len);
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sx127x_packet_t packet;
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packet.data_len = data_len;
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packet.data = heap_caps_malloc(data_len, MALLOC_CAP_DMA);
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SX127X_CHECK(packet.data != NULL, "malloc error", ESP_ERR_NO_MEM);
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memcpy(packet.data, data, data_len);
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BaseType_t pdRet = xQueueSend(handle->tx_packet_queue, &packet, ticks_to_wait);
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BaseType_t pdRet =
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xQueueSend(handle->tx_packet_queue, &packet, ticks_to_wait);
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SX127X_CHECK(pdRet == pdTRUE, "tx queue full", ESP_ERR_TIMEOUT);
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return ESP_OK;
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}
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@ -82,4 +82,5 @@ esp_err_t sx127x_start(sx127x_t *handle);
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esp_err_t sx127x_stop(sx127x_t *handle);
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esp_err_t sx127x_send_packet(sx127x_t *handle, const char *data, size_t data_len, TickType_t ticks_to_wait);
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esp_err_t sx127x_send_packet(sx127x_t *handle, const char *data,
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size_t data_len, TickType_t ticks_to_wait);
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@ -71,42 +71,45 @@ typedef enum sx127x_op_mode {
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#define IRQ_RX_DONE_MASK 0x40
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#ifdef NODEBUG
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#define SX127X_CHECK(check, str, ret_val, ...) \
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if (!(check)) { \
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ESP_LOGE(SX127X_TAG, str, ##__VA_ARGS__); \
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return (ret_val); \
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#define SX127X_CHECK(check, str, ret_val, ...) \
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if (!(check)) { \
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ESP_LOGE(SX127X_TAG, str, ##__VA_ARGS__); \
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return (ret_val); \
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}
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#define SX127X_ERROR_CHECK(ret) \
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{ \
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esp_err_t _error_code = (ret); \
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if (_error_code != ESP_OK) { \
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return _error_code; \
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} \
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#define SX127X_ERROR_CHECK(ret) \
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{ \
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esp_err_t _error_code = (ret); \
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if (_error_code != ESP_OK) { \
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return _error_code; \
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} \
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}
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#define SX127X_ERROR_CHECK2(ret, fun) SX127X_CHECK(ret)
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#else
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#define SX127X_CHECK(check, str, ret_val, ...) \
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if (!(check)) { \
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ESP_LOGE(SX127X_TAG, "%s:%d: check %s failed: " str, __FUNCTION__, __LINE__, #check, ##__VA_ARGS__); \
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return (ret_val); \
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#define SX127X_CHECK(check, str, ret_val, ...) \
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if (!(check)) { \
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ESP_LOGE(SX127X_TAG, "%s:%d: check %s failed: " str, __FUNCTION__, \
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__LINE__, #check, ##__VA_ARGS__); \
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return (ret_val); \
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}
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#define SX127X_ERROR_CHECK(ret) \
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{ \
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esp_err_t _error_code = (ret); \
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if (_error_code != ESP_OK) { \
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const char *_error_name = esp_err_to_name(_error_code); \
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ESP_LOGE(SX127X_TAG, "%s:%d: %s (%d)", __FUNCTION__, __LINE__, _error_name, _error_code); \
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return _error_code; \
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} \
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#define SX127X_ERROR_CHECK(ret) \
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{ \
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esp_err_t _error_code = (ret); \
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if (_error_code != ESP_OK) { \
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const char *_error_name = esp_err_to_name(_error_code); \
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ESP_LOGE(SX127X_TAG, "%s:%d: %s (%d)", __FUNCTION__, __LINE__, \
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_error_name, _error_code); \
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return _error_code; \
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} \
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}
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#define SX127X_ERROR_CHECK2(ret, fun) \
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{ \
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esp_err_t _error_code = (ret); \
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if (_error_code != ESP_OK) { \
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const char *_error_name = esp_err_to_name(_error_code); \
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ESP_LOGE(SX127X_TAG, "%s:%d: %s failed: %s (%d)", __FUNCTION__, __LINE__, #fun, _error_name, _error_code); \
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||||
return _error_code; \
|
||||
} \
|
||||
#define SX127X_ERROR_CHECK2(ret, fun) \
|
||||
{ \
|
||||
esp_err_t _error_code = (ret); \
|
||||
if (_error_code != ESP_OK) { \
|
||||
const char *_error_name = esp_err_to_name(_error_code); \
|
||||
ESP_LOGE(SX127X_TAG, "%s:%d: %s failed: %s (%d)", __FUNCTION__, \
|
||||
__LINE__, #fun, _error_name, _error_code); \
|
||||
return _error_code; \
|
||||
} \
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -121,7 +124,8 @@ struct sx127x {
|
||||
spi_device_handle_t device_handle;
|
||||
TaskHandle_t task_handle;
|
||||
sx127x_task_state_t task_state;
|
||||
// binary semaphore which is given when an interrupt is received from the radio
|
||||
// binary semaphore which is given when an interrupt is received from the
|
||||
// radio
|
||||
SemaphoreHandle_t intr_semaphore;
|
||||
// queue of packets received from the radio
|
||||
QueueHandle_t rx_packet_queue;
|
||||
|
@ -11,7 +11,8 @@ esp_err_t sx127x_write_register(sx127x_t *handle, uint8_t reg, uint8_t value) {
|
||||
return sx127x_single_transfer(handle, reg | 0x80, value, NULL);
|
||||
}
|
||||
|
||||
esp_err_t sx127x_single_transfer(sx127x_t *handle, uint8_t addr, uint8_t to_slave, uint8_t *from_slave) {
|
||||
esp_err_t sx127x_single_transfer(sx127x_t *handle, uint8_t addr,
|
||||
uint8_t to_slave, uint8_t *from_slave) {
|
||||
spi_transaction_t trans;
|
||||
memset(&trans, 0, sizeof(trans));
|
||||
trans.flags = SPI_TRANS_USE_RXDATA | SPI_TRANS_USE_TXDATA;
|
||||
@ -25,16 +26,19 @@ esp_err_t sx127x_single_transfer(sx127x_t *handle, uint8_t addr, uint8_t to_slav
|
||||
if (from_slave) {
|
||||
*from_slave = trans.rx_data[0];
|
||||
}
|
||||
ESP_LOGV(SX127X_TAG, "sx127x_single_transfer(%#x, %#x, %#x)", addr, trans.tx_data[0], trans.rx_data[0]);
|
||||
ESP_LOGV(SX127X_TAG, "sx127x_single_transfer(%#x, %#x, %#x)", addr,
|
||||
trans.tx_data[0], trans.rx_data[0]);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t sx127x_sleep(sx127x_t *handle) {
|
||||
return sx127x_write_register(handle, REG_OP_MODE, SX127X_LONG_RANGE | SX127X_MODE_SLEEP);
|
||||
return sx127x_write_register(handle, REG_OP_MODE,
|
||||
SX127X_LONG_RANGE | SX127X_MODE_SLEEP);
|
||||
}
|
||||
|
||||
esp_err_t sx127x_standby(sx127x_t *handle) {
|
||||
return sx127x_write_register(handle, REG_OP_MODE, SX127X_LONG_RANGE | SX127X_MODE_STDBY);
|
||||
return sx127x_write_register(handle, REG_OP_MODE,
|
||||
SX127X_LONG_RANGE | SX127X_MODE_STDBY);
|
||||
}
|
||||
|
||||
esp_err_t sx127x_set_frequency(sx127x_t *handle, uint64_t frequency) {
|
||||
@ -54,15 +58,19 @@ esp_err_t sx127x_set_frequency(sx127x_t *handle, uint64_t frequency) {
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t sx127x_set_tx_power(sx127x_t *handle, uint8_t tx_power, sx127x_pa_boost_t pa_boost) {
|
||||
esp_err_t sx127x_set_tx_power(sx127x_t *handle, uint8_t tx_power,
|
||||
sx127x_pa_boost_t pa_boost) {
|
||||
esp_err_t ret;
|
||||
if (pa_boost == SX127X_PA_BOOST_ENABLED) {
|
||||
// PA BOOST
|
||||
SX127X_CHECK(tx_power >= 2 && tx_power <= 20, "invalid tx_power: %d", ESP_ERR_INVALID_ARG, tx_power);
|
||||
ret = sx127x_write_register(handle, REG_PA_CONFIG, PA_BOOST | (tx_power - 2));
|
||||
SX127X_CHECK(tx_power >= 2 && tx_power <= 20, "invalid tx_power: %d",
|
||||
ESP_ERR_INVALID_ARG, tx_power);
|
||||
ret =
|
||||
sx127x_write_register(handle, REG_PA_CONFIG, PA_BOOST | (tx_power - 2));
|
||||
} else {
|
||||
// RFO
|
||||
SX127X_CHECK(tx_power <= 14, "invalid tx_power: %d", ESP_ERR_INVALID_ARG, tx_power);
|
||||
SX127X_CHECK(tx_power <= 14, "invalid tx_power: %d", ESP_ERR_INVALID_ARG,
|
||||
tx_power);
|
||||
ret = sx127x_write_register(handle, REG_PA_CONFIG, 0x70 | tx_power);
|
||||
}
|
||||
SX127X_ERROR_CHECK(ret);
|
||||
@ -71,8 +79,10 @@ esp_err_t sx127x_set_tx_power(sx127x_t *handle, uint8_t tx_power, sx127x_pa_boos
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t sx127x_set_spreading_factor(sx127x_t *handle, uint8_t spreading_factor) {
|
||||
SX127X_CHECK(spreading_factor >= 6 && spreading_factor <= 12, "invalid spreading_factor", ESP_ERR_INVALID_ARG);
|
||||
esp_err_t sx127x_set_spreading_factor(sx127x_t *handle,
|
||||
uint8_t spreading_factor) {
|
||||
SX127X_CHECK(spreading_factor >= 6 && spreading_factor <= 12,
|
||||
"invalid spreading_factor", ESP_ERR_INVALID_ARG);
|
||||
// section 4.1.1.2 in SX1276 datasheet
|
||||
uint8_t detection_optimize, detection_threshold;
|
||||
if (spreading_factor == 6) {
|
||||
@ -82,24 +92,31 @@ esp_err_t sx127x_set_spreading_factor(sx127x_t *handle, uint8_t spreading_factor
|
||||
detection_optimize = 0xc3;
|
||||
detection_threshold = 0x0a;
|
||||
}
|
||||
SX127X_ERROR_CHECK(sx127x_write_register(handle, REG_DETECTION_OPTIMIZE, detection_optimize));
|
||||
SX127X_ERROR_CHECK(sx127x_write_register(handle, REG_DETECTION_THRESHOLD, detection_threshold));
|
||||
SX127X_ERROR_CHECK(sx127x_write_register(handle, REG_DETECTION_OPTIMIZE,
|
||||
detection_optimize));
|
||||
SX127X_ERROR_CHECK(sx127x_write_register(handle, REG_DETECTION_THRESHOLD,
|
||||
detection_threshold));
|
||||
|
||||
uint8_t modem_config_3;
|
||||
SX127X_ERROR_CHECK(sx127x_read_register(handle, REG_MODEM_CONFIG_3, &modem_config_3));
|
||||
SX127X_ERROR_CHECK(
|
||||
sx127x_read_register(handle, REG_MODEM_CONFIG_3, &modem_config_3));
|
||||
modem_config_3 = (modem_config_3 & 0x03) | ((spreading_factor << 4) & 0xf0);
|
||||
SX127X_ERROR_CHECK(sx127x_write_register(handle, REG_MODEM_CONFIG_3, modem_config_3));
|
||||
SX127X_ERROR_CHECK(
|
||||
sx127x_write_register(handle, REG_MODEM_CONFIG_3, modem_config_3));
|
||||
|
||||
handle->config.spreading_factor = spreading_factor;
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t sx127x_set_signal_bandwidth(sx127x_t *handle, uint64_t signal_bandwidth) {
|
||||
esp_err_t sx127x_set_signal_bandwidth(sx127x_t *handle,
|
||||
uint64_t signal_bandwidth) {
|
||||
uint8_t bw_reg = sx127x_bw_to_reg(signal_bandwidth);
|
||||
uint8_t modem_config_1;
|
||||
SX127X_ERROR_CHECK(sx127x_read_register(handle, REG_MODEM_CONFIG_1, &modem_config_1));
|
||||
SX127X_ERROR_CHECK(
|
||||
sx127x_read_register(handle, REG_MODEM_CONFIG_1, &modem_config_1));
|
||||
modem_config_1 = (modem_config_1 & 0x0f) | (bw_reg << 4);
|
||||
SX127X_ERROR_CHECK(sx127x_write_register(handle, REG_MODEM_CONFIG_1, modem_config_1));
|
||||
SX127X_ERROR_CHECK(
|
||||
sx127x_write_register(handle, REG_MODEM_CONFIG_1, modem_config_1));
|
||||
handle->config.signal_bandwidth = signal_bandwidth;
|
||||
|
||||
// set low data rate optimization flag
|
||||
@ -110,16 +127,18 @@ esp_err_t sx127x_set_signal_bandwidth(sx127x_t *handle, uint64_t signal_bandwidt
|
||||
|
||||
// section 4.1.1.6
|
||||
bool must_have_ldo = (symbol_duration_ms > 16);
|
||||
bool ldo = must_have_ldo || (handle->config.ldo == SX127X_LDO_ENABLED);
|
||||
bool ldo = must_have_ldo || (handle->config.ldo == SX127X_LDO_ENABLED);
|
||||
|
||||
uint8_t modem_config_3;
|
||||
SX127X_ERROR_CHECK(sx127x_read_register(handle, REG_MODEM_CONFIG_3, &modem_config_3));
|
||||
SX127X_ERROR_CHECK(
|
||||
sx127x_read_register(handle, REG_MODEM_CONFIG_3, &modem_config_3));
|
||||
if (ldo) {
|
||||
modem_config_3 |= (1 << 3);
|
||||
} else {
|
||||
modem_config_3 &= ~(1 << 3);
|
||||
}
|
||||
SX127X_ERROR_CHECK(sx127x_write_register(handle, REG_MODEM_CONFIG_3, modem_config_3));
|
||||
SX127X_ERROR_CHECK(
|
||||
sx127x_write_register(handle, REG_MODEM_CONFIG_3, modem_config_3));
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
@ -150,17 +169,17 @@ uint8_t sx127x_bw_to_reg(uint64_t bandwidth) {
|
||||
|
||||
uint64_t sx127x_reg_to_bw(uint8_t bandwidth_reg) {
|
||||
switch (bandwidth_reg) {
|
||||
case 0: return 7.8E3;
|
||||
case 1: return 10.4E3;
|
||||
case 2: return 15.6E3;
|
||||
case 3: return 20.8E3;
|
||||
case 4: return 31.25E3;
|
||||
case 5: return 41.7E3;
|
||||
case 6: return 62.5E3;
|
||||
case 7: return 125E3;
|
||||
case 8: return 250E3;
|
||||
default:
|
||||
case 9: return 500E3;
|
||||
case 0: return 7.8E3;
|
||||
case 1: return 10.4E3;
|
||||
case 2: return 15.6E3;
|
||||
case 3: return 20.8E3;
|
||||
case 4: return 31.25E3;
|
||||
case 5: return 41.7E3;
|
||||
case 6: return 62.5E3;
|
||||
case 7: return 125E3;
|
||||
case 8: return 250E3;
|
||||
default:
|
||||
case 9: return 500E3;
|
||||
}
|
||||
}
|
||||
|
||||
@ -172,13 +191,15 @@ esp_err_t sx127x_set_sync_word(sx127x_t *handle, uint8_t sync_word) {
|
||||
|
||||
esp_err_t sx127x_set_crc(sx127x_t *handle, sx127x_crc_t crc) {
|
||||
uint8_t modem_config_2;
|
||||
SX127X_ERROR_CHECK(sx127x_read_register(handle, REG_MODEM_CONFIG_2, &modem_config_2));
|
||||
SX127X_ERROR_CHECK(
|
||||
sx127x_read_register(handle, REG_MODEM_CONFIG_2, &modem_config_2));
|
||||
if (crc == SX127X_CRC_ENABLED) {
|
||||
modem_config_2 |= CONFIG2_CRC;
|
||||
} else {
|
||||
modem_config_2 &= ~CONFIG2_CRC;
|
||||
}
|
||||
SX127X_ERROR_CHECK(sx127x_write_register(handle, REG_MODEM_CONFIG_2, modem_config_2));
|
||||
SX127X_ERROR_CHECK(
|
||||
sx127x_write_register(handle, REG_MODEM_CONFIG_2, modem_config_2));
|
||||
handle->config.crc = crc;
|
||||
return ESP_OK;
|
||||
}
|
||||
|
@ -2,7 +2,8 @@
|
||||
|
||||
esp_err_t sx127x_read_register(sx127x_t *handle, uint8_t reg, uint8_t *value);
|
||||
esp_err_t sx127x_write_register(sx127x_t *handle, uint8_t reg, uint8_t value);
|
||||
esp_err_t sx127x_single_transfer(sx127x_t *handle, uint8_t addr, uint8_t to_slave, uint8_t *from_slave);
|
||||
esp_err_t sx127x_single_transfer(sx127x_t *handle, uint8_t addr,
|
||||
uint8_t to_slave, uint8_t *from_slave);
|
||||
|
||||
esp_err_t sx127x_sleep(sx127x_t *handle);
|
||||
|
||||
@ -10,11 +11,14 @@ esp_err_t sx127x_standby(sx127x_t *handle);
|
||||
|
||||
esp_err_t sx127x_set_frequency(sx127x_t *handle, uint64_t frequency);
|
||||
|
||||
esp_err_t sx127x_set_tx_power(sx127x_t *handle, uint8_t tx_power, sx127x_pa_boost_t pa_boost);
|
||||
esp_err_t sx127x_set_tx_power(sx127x_t *handle, uint8_t tx_power,
|
||||
sx127x_pa_boost_t pa_boost);
|
||||
|
||||
esp_err_t sx127x_set_spreading_factor(sx127x_t *handle, uint8_t spreading_factor);
|
||||
esp_err_t sx127x_set_spreading_factor(sx127x_t *handle,
|
||||
uint8_t spreading_factor);
|
||||
|
||||
esp_err_t sx127x_set_signal_bandwidth(sx127x_t *handle, uint64_t signal_bandwidth);
|
||||
esp_err_t sx127x_set_signal_bandwidth(sx127x_t *handle,
|
||||
uint64_t signal_bandwidth);
|
||||
uint8_t sx127x_bw_to_reg(uint64_t bandwidth);
|
||||
uint64_t sx127x_reg_to_bw(uint8_t bandwidth_reg);
|
||||
|
||||
@ -23,4 +27,5 @@ esp_err_t sx127x_set_sync_word(sx127x_t *handle, uint8_t sync_word);
|
||||
esp_err_t sx127x_set_crc(sx127x_t *handle, sx127x_crc_t crc);
|
||||
|
||||
esp_err_t sx127x_write_fifo(sx127x_t *handle, char *data, size_t data_len);
|
||||
esp_err_t sx127x_read_fifo(sx127x_t *handle, char *data_out, size_t *data_len_out);
|
||||
esp_err_t sx127x_read_fifo(sx127x_t *handle, char *data_out,
|
||||
size_t *data_len_out);
|
||||
|
@ -12,19 +12,19 @@
|
||||
static const char * TAG = "u8g2_hal";
|
||||
static const unsigned int I2C_TIMEOUT_MS = 10;
|
||||
|
||||
static spi_device_handle_t handle_spi; // SPI handle.
|
||||
static i2c_cmd_handle_t handle_i2c; // I2C handle.
|
||||
static u8g2_esp32_hal_t u8g2_esp32_hal; // HAL state data.
|
||||
static spi_device_handle_t handle_spi; // SPI handle.
|
||||
static i2c_cmd_handle_t handle_i2c; // I2C handle.
|
||||
static u8g2_esp32_hal_t u8g2_esp32_hal; // HAL state data.
|
||||
|
||||
#undef ESP_ERROR_CHECK
|
||||
#define ESP_ERROR_CHECK(x) \
|
||||
do { \
|
||||
esp_err_t _rc = (x); \
|
||||
if (_rc != ESP_OK) { \
|
||||
const char *_error_name = esp_err_to_name(_rc); \
|
||||
ESP_LOGE(TAG, "%s failed: %s (%d)", #x, _error_name, _rc); \
|
||||
return 0; \
|
||||
} \
|
||||
#define ESP_ERROR_CHECK(x) \
|
||||
do { \
|
||||
esp_err_t _rc = (x); \
|
||||
if (_rc != ESP_OK) { \
|
||||
const char *_error_name = esp_err_to_name(_rc); \
|
||||
ESP_LOGE(TAG, "%s failed: %s (%d)", #x, _error_name, _rc); \
|
||||
return 0; \
|
||||
} \
|
||||
} while (0);
|
||||
|
||||
/*
|
||||
@ -32,219 +32,229 @@ static u8g2_esp32_hal_t u8g2_esp32_hal; // HAL state data.
|
||||
*/
|
||||
void u8g2_esp32_hal_init(u8g2_esp32_hal_t u8g2_esp32_hal_param) {
|
||||
u8g2_esp32_hal = u8g2_esp32_hal_param;
|
||||
} // u8g2_esp32_hal_init
|
||||
} // u8g2_esp32_hal_init
|
||||
|
||||
/*
|
||||
* HAL callback function as prescribed by the U8G2 library. This callback is
|
||||
* invoked to handle SPI communications.
|
||||
*/
|
||||
uint8_t u8g2_esp32_spi_byte_cb(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) {
|
||||
ESP_LOGV(TAG, "spi_byte_cb: Received a msg: %d, arg_int: %d, arg_ptr: %p", msg, arg_int, arg_ptr);
|
||||
uint8_t u8g2_esp32_spi_byte_cb(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int,
|
||||
void *arg_ptr) {
|
||||
ESP_LOGV(TAG, "spi_byte_cb: Received a msg: %d, arg_int: %d, arg_ptr: %p",
|
||||
msg, arg_int, arg_ptr);
|
||||
switch (msg) {
|
||||
case U8X8_MSG_BYTE_SET_DC:
|
||||
if (u8g2_esp32_hal.dc != U8G2_ESP32_HAL_UNDEFINED) {
|
||||
gpio_set_level(u8g2_esp32_hal.dc, arg_int);
|
||||
}
|
||||
break;
|
||||
case U8X8_MSG_BYTE_SET_DC:
|
||||
if (u8g2_esp32_hal.dc != U8G2_ESP32_HAL_UNDEFINED) {
|
||||
gpio_set_level(u8g2_esp32_hal.dc, arg_int);
|
||||
}
|
||||
break;
|
||||
|
||||
case U8X8_MSG_BYTE_INIT: {
|
||||
if (u8g2_esp32_hal.clk == U8G2_ESP32_HAL_UNDEFINED ||
|
||||
u8g2_esp32_hal.mosi == U8G2_ESP32_HAL_UNDEFINED ||
|
||||
u8g2_esp32_hal.cs == U8G2_ESP32_HAL_UNDEFINED) {
|
||||
break;
|
||||
}
|
||||
|
||||
spi_bus_config_t bus_config;
|
||||
memset(&bus_config, 0, sizeof(spi_bus_config_t));
|
||||
bus_config.sclk_io_num = u8g2_esp32_hal.clk; // CLK
|
||||
bus_config.mosi_io_num = u8g2_esp32_hal.mosi; // MOSI
|
||||
bus_config.miso_io_num = -1; // MISO
|
||||
bus_config.quadwp_io_num = -1; // Not used
|
||||
bus_config.quadhd_io_num = -1; // Not used
|
||||
// ESP_LOGI(TAG, "... Initializing bus.");
|
||||
ESP_ERROR_CHECK(spi_bus_initialize(HSPI_HOST, &bus_config, 1));
|
||||
|
||||
spi_device_interface_config_t dev_config;
|
||||
dev_config.address_bits = 0;
|
||||
dev_config.command_bits = 0;
|
||||
dev_config.dummy_bits = 0;
|
||||
dev_config.mode = 0;
|
||||
dev_config.duty_cycle_pos = 0;
|
||||
dev_config.cs_ena_posttrans = 0;
|
||||
dev_config.cs_ena_pretrans = 0;
|
||||
dev_config.clock_speed_hz = 10000;
|
||||
dev_config.spics_io_num = u8g2_esp32_hal.cs;
|
||||
dev_config.flags = 0;
|
||||
dev_config.queue_size = 200;
|
||||
dev_config.pre_cb = NULL;
|
||||
dev_config.post_cb = NULL;
|
||||
// ESP_LOGI(TAG, "... Adding device bus.");
|
||||
ESP_ERROR_CHECK(spi_bus_add_device(HSPI_HOST, &dev_config, &handle_spi));
|
||||
|
||||
case U8X8_MSG_BYTE_INIT: {
|
||||
if (u8g2_esp32_hal.clk == U8G2_ESP32_HAL_UNDEFINED || u8g2_esp32_hal.mosi == U8G2_ESP32_HAL_UNDEFINED ||
|
||||
u8g2_esp32_hal.cs == U8G2_ESP32_HAL_UNDEFINED) {
|
||||
break;
|
||||
}
|
||||
|
||||
spi_bus_config_t bus_config;
|
||||
memset(&bus_config, 0, sizeof(spi_bus_config_t));
|
||||
bus_config.sclk_io_num = u8g2_esp32_hal.clk; // CLK
|
||||
bus_config.mosi_io_num = u8g2_esp32_hal.mosi; // MOSI
|
||||
bus_config.miso_io_num = -1; // MISO
|
||||
bus_config.quadwp_io_num = -1; // Not used
|
||||
bus_config.quadhd_io_num = -1; // Not used
|
||||
// ESP_LOGI(TAG, "... Initializing bus.");
|
||||
ESP_ERROR_CHECK(spi_bus_initialize(HSPI_HOST, &bus_config, 1));
|
||||
case U8X8_MSG_BYTE_SEND: {
|
||||
spi_transaction_t trans_desc;
|
||||
trans_desc.addr = 0;
|
||||
trans_desc.cmd = 0;
|
||||
trans_desc.flags = 0;
|
||||
trans_desc.length = 8 * arg_int; // Number of bits NOT number of bytes.
|
||||
trans_desc.rxlength = 0;
|
||||
trans_desc.tx_buffer = arg_ptr;
|
||||
trans_desc.rx_buffer = NULL;
|
||||
|
||||
spi_device_interface_config_t dev_config;
|
||||
dev_config.address_bits = 0;
|
||||
dev_config.command_bits = 0;
|
||||
dev_config.dummy_bits = 0;
|
||||
dev_config.mode = 0;
|
||||
dev_config.duty_cycle_pos = 0;
|
||||
dev_config.cs_ena_posttrans = 0;
|
||||
dev_config.cs_ena_pretrans = 0;
|
||||
dev_config.clock_speed_hz = 10000;
|
||||
dev_config.spics_io_num = u8g2_esp32_hal.cs;
|
||||
dev_config.flags = 0;
|
||||
dev_config.queue_size = 200;
|
||||
dev_config.pre_cb = NULL;
|
||||
dev_config.post_cb = NULL;
|
||||
// ESP_LOGI(TAG, "... Adding device bus.");
|
||||
ESP_ERROR_CHECK(spi_bus_add_device(HSPI_HOST, &dev_config, &handle_spi));
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
case U8X8_MSG_BYTE_SEND: {
|
||||
spi_transaction_t trans_desc;
|
||||
trans_desc.addr = 0;
|
||||
trans_desc.cmd = 0;
|
||||
trans_desc.flags = 0;
|
||||
trans_desc.length = 8 * arg_int; // Number of bits NOT number of bytes.
|
||||
trans_desc.rxlength = 0;
|
||||
trans_desc.tx_buffer = arg_ptr;
|
||||
trans_desc.rx_buffer = NULL;
|
||||
|
||||
// ESP_LOGI(TAG, "... Transmitting %d bytes.", arg_int);
|
||||
ESP_ERROR_CHECK(spi_device_transmit(handle_spi, &trans_desc));
|
||||
break;
|
||||
}
|
||||
// ESP_LOGI(TAG, "... Transmitting %d bytes.", arg_int);
|
||||
ESP_ERROR_CHECK(spi_device_transmit(handle_spi, &trans_desc));
|
||||
break;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
} // u8g2_esp32_spi_byte_cb
|
||||
} // u8g2_esp32_spi_byte_cb
|
||||
|
||||
/*
|
||||
* HAL callback function as prescribed by the U8G2 library. This callback is
|
||||
* invoked to handle I2C communications.
|
||||
*/
|
||||
uint8_t u8g2_esp32_i2c_byte_cb(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) {
|
||||
uint8_t u8g2_esp32_i2c_byte_cb(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int,
|
||||
void *arg_ptr) {
|
||||
#define TXBUF_SIZE 32
|
||||
static uint8_t txbuf[TXBUF_SIZE];
|
||||
static uint8_t *txbuf_ptr;
|
||||
// ESP_LOGV(TAG, "i2c_cb: Received a msg: %d, arg_int: %d, arg_ptr: %p", msg,
|
||||
// arg_int, arg_ptr);
|
||||
switch (msg) {
|
||||
case U8X8_MSG_BYTE_SET_DC: {
|
||||
if (u8g2_esp32_hal.dc != U8G2_ESP32_HAL_UNDEFINED) {
|
||||
gpio_set_level(u8g2_esp32_hal.dc, arg_int);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case U8X8_MSG_BYTE_INIT: {
|
||||
if (u8g2_esp32_hal.sda == U8G2_ESP32_HAL_UNDEFINED || u8g2_esp32_hal.scl == U8G2_ESP32_HAL_UNDEFINED) {
|
||||
case U8X8_MSG_BYTE_SET_DC: {
|
||||
if (u8g2_esp32_hal.dc != U8G2_ESP32_HAL_UNDEFINED) {
|
||||
gpio_set_level(u8g2_esp32_hal.dc, arg_int);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
i2c_config_t conf;
|
||||
conf.mode = I2C_MODE_MASTER;
|
||||
conf.sda_io_num = u8g2_esp32_hal.sda;
|
||||
conf.sda_pullup_en = GPIO_PULLUP_ENABLE;
|
||||
conf.scl_io_num = u8g2_esp32_hal.scl;
|
||||
conf.scl_pullup_en = GPIO_PULLUP_ENABLE;
|
||||
ESP_LOGV(TAG, "clk_speed %d", I2C_MASTER_FREQ_HZ);
|
||||
conf.master.clk_speed = I2C_MASTER_FREQ_HZ;
|
||||
ESP_ERROR_CHECK(i2c_param_config(I2C_MASTER_NUM, &conf));
|
||||
ESP_ERROR_CHECK(i2c_driver_install(I2C_MASTER_NUM,
|
||||
conf.mode,
|
||||
I2C_MASTER_RX_BUF_DISABLE,
|
||||
I2C_MASTER_TX_BUF_DISABLE,
|
||||
ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_LEVEL1));
|
||||
break;
|
||||
}
|
||||
case U8X8_MSG_BYTE_INIT: {
|
||||
if (u8g2_esp32_hal.sda == U8G2_ESP32_HAL_UNDEFINED ||
|
||||
u8g2_esp32_hal.scl == U8G2_ESP32_HAL_UNDEFINED) {
|
||||
break;
|
||||
}
|
||||
|
||||
case U8X8_MSG_BYTE_SEND: {
|
||||
uint8_t *data_ptr = (uint8_t *)arg_ptr;
|
||||
size_t data_len = (size_t)arg_int;
|
||||
// ESP_LOGV(TAG, "U8x8_MSG_BYTE_SEND. txbuf len: %d", txbuf_ptr - txbuf);
|
||||
// ESP_LOG_BUFFER_HEXDUMP(TAG, data_ptr, data_len, ESP_LOG_VERBOSE);
|
||||
|
||||
if (txbuf_ptr + data_len >= txbuf_ptr + TXBUF_SIZE) {
|
||||
ESP_LOGE(TAG, "txbuf overflow");
|
||||
return 0;
|
||||
i2c_config_t conf;
|
||||
conf.mode = I2C_MODE_MASTER;
|
||||
conf.sda_io_num = u8g2_esp32_hal.sda;
|
||||
conf.sda_pullup_en = GPIO_PULLUP_ENABLE;
|
||||
conf.scl_io_num = u8g2_esp32_hal.scl;
|
||||
conf.scl_pullup_en = GPIO_PULLUP_ENABLE;
|
||||
ESP_LOGV(TAG, "clk_speed %d", I2C_MASTER_FREQ_HZ);
|
||||
conf.master.clk_speed = I2C_MASTER_FREQ_HZ;
|
||||
ESP_ERROR_CHECK(i2c_param_config(I2C_MASTER_NUM, &conf));
|
||||
ESP_ERROR_CHECK(i2c_driver_install(
|
||||
I2C_MASTER_NUM, conf.mode, I2C_MASTER_RX_BUF_DISABLE,
|
||||
I2C_MASTER_TX_BUF_DISABLE,
|
||||
ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_LEVEL1));
|
||||
break;
|
||||
}
|
||||
memcpy(txbuf_ptr, data_ptr, data_len);
|
||||
txbuf_ptr += data_len;
|
||||
break;
|
||||
}
|
||||
|
||||
case U8X8_MSG_BYTE_START_TRANSFER: {
|
||||
uint8_t i2c_address = u8x8_GetI2CAddress(u8x8);
|
||||
handle_i2c = i2c_cmd_link_create();
|
||||
// ESP_LOGV(TAG, "Start I2C transfer to %02X.", i2c_address >> 1);
|
||||
ESP_ERROR_CHECK(i2c_master_start(handle_i2c));
|
||||
ESP_ERROR_CHECK(i2c_master_write_byte(handle_i2c, i2c_address | I2C_MASTER_WRITE, ACK_CHECK_EN));
|
||||
txbuf_ptr = txbuf;
|
||||
break;
|
||||
}
|
||||
case U8X8_MSG_BYTE_SEND: {
|
||||
uint8_t *data_ptr = (uint8_t *)arg_ptr;
|
||||
size_t data_len = (size_t)arg_int;
|
||||
// ESP_LOGV(TAG, "U8x8_MSG_BYTE_SEND. txbuf len: %d", txbuf_ptr - txbuf);
|
||||
// ESP_LOG_BUFFER_HEXDUMP(TAG, data_ptr, data_len, ESP_LOG_VERBOSE);
|
||||
|
||||
case U8X8_MSG_BYTE_END_TRANSFER: {
|
||||
ESP_LOGV(TAG, "end I2C transfer. txbuf len: %d", txbuf_ptr - txbuf);
|
||||
// ESP_LOG_BUFFER_HEXDUMP(TAG, txbuf, txbuf_ptr - txbuf, ESP_LOG_VERBOSE);
|
||||
ESP_ERROR_CHECK(i2c_master_write(handle_i2c, txbuf, txbuf_ptr - txbuf, ACK_CHECK_EN));
|
||||
ESP_ERROR_CHECK(i2c_master_stop(handle_i2c));
|
||||
ESP_ERROR_CHECK(i2c_master_cmd_begin(I2C_MASTER_NUM, handle_i2c, I2C_TIMEOUT_MS / portTICK_RATE_MS));
|
||||
i2c_cmd_link_delete(handle_i2c);
|
||||
break;
|
||||
}
|
||||
default: return 0;
|
||||
if (txbuf_ptr + data_len >= txbuf_ptr + TXBUF_SIZE) {
|
||||
ESP_LOGE(TAG, "txbuf overflow");
|
||||
return 0;
|
||||
}
|
||||
memcpy(txbuf_ptr, data_ptr, data_len);
|
||||
txbuf_ptr += data_len;
|
||||
break;
|
||||
}
|
||||
|
||||
case U8X8_MSG_BYTE_START_TRANSFER: {
|
||||
uint8_t i2c_address = u8x8_GetI2CAddress(u8x8);
|
||||
handle_i2c = i2c_cmd_link_create();
|
||||
// ESP_LOGV(TAG, "Start I2C transfer to %02X.", i2c_address >> 1);
|
||||
ESP_ERROR_CHECK(i2c_master_start(handle_i2c));
|
||||
ESP_ERROR_CHECK(i2c_master_write_byte(
|
||||
handle_i2c, i2c_address | I2C_MASTER_WRITE, ACK_CHECK_EN));
|
||||
txbuf_ptr = txbuf;
|
||||
break;
|
||||
}
|
||||
|
||||
case U8X8_MSG_BYTE_END_TRANSFER: {
|
||||
ESP_LOGV(TAG, "end I2C transfer. txbuf len: %d", txbuf_ptr - txbuf);
|
||||
// ESP_LOG_BUFFER_HEXDUMP(TAG, txbuf, txbuf_ptr - txbuf, ESP_LOG_VERBOSE);
|
||||
ESP_ERROR_CHECK(
|
||||
i2c_master_write(handle_i2c, txbuf, txbuf_ptr - txbuf, ACK_CHECK_EN));
|
||||
ESP_ERROR_CHECK(i2c_master_stop(handle_i2c));
|
||||
ESP_ERROR_CHECK(i2c_master_cmd_begin(I2C_MASTER_NUM, handle_i2c,
|
||||
I2C_TIMEOUT_MS / portTICK_RATE_MS));
|
||||
i2c_cmd_link_delete(handle_i2c);
|
||||
break;
|
||||
}
|
||||
default: return 0;
|
||||
}
|
||||
return 1;
|
||||
} // u8g2_esp32_i2c_byte_cb
|
||||
} // u8g2_esp32_i2c_byte_cb
|
||||
|
||||
/*
|
||||
* HAL callback function as prescribed by the U8G2 library. This callback is
|
||||
* invoked to handle callbacks for GPIO and delay functions.
|
||||
*/
|
||||
uint8_t u8g2_esp32_gpio_and_delay_cb(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) {
|
||||
ESP_LOGV(TAG, "gpio_and_delay_cb: Received a msg: %d, arg_int: %d, arg_ptr: %p", msg, arg_int, arg_ptr);
|
||||
uint8_t u8g2_esp32_gpio_and_delay_cb(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int,
|
||||
void *arg_ptr) {
|
||||
ESP_LOGV(TAG,
|
||||
"gpio_and_delay_cb: Received a msg: %d, arg_int: %d, arg_ptr: %p",
|
||||
msg, arg_int, arg_ptr);
|
||||
|
||||
switch (msg) {
|
||||
// Initialize the GPIO and DELAY HAL functions. If the pins for DC and
|
||||
// RESET have been specified then we define those pins as GPIO outputs.
|
||||
case U8X8_MSG_GPIO_AND_DELAY_INIT: {
|
||||
uint64_t bitmask = 0;
|
||||
if (u8g2_esp32_hal.dc != U8G2_ESP32_HAL_UNDEFINED) {
|
||||
bitmask = bitmask | (1ull << u8g2_esp32_hal.dc);
|
||||
}
|
||||
if (u8g2_esp32_hal.reset != U8G2_ESP32_HAL_UNDEFINED) {
|
||||
bitmask = bitmask | (1ull << u8g2_esp32_hal.reset);
|
||||
}
|
||||
if (u8g2_esp32_hal.cs != U8G2_ESP32_HAL_UNDEFINED) {
|
||||
bitmask = bitmask | (1ull << u8g2_esp32_hal.cs);
|
||||
}
|
||||
// Initialize the GPIO and DELAY HAL functions. If the pins for DC and
|
||||
// RESET have been specified then we define those pins as GPIO outputs.
|
||||
case U8X8_MSG_GPIO_AND_DELAY_INIT: {
|
||||
uint64_t bitmask = 0;
|
||||
if (u8g2_esp32_hal.dc != U8G2_ESP32_HAL_UNDEFINED) {
|
||||
bitmask = bitmask | (1ull << u8g2_esp32_hal.dc);
|
||||
}
|
||||
if (u8g2_esp32_hal.reset != U8G2_ESP32_HAL_UNDEFINED) {
|
||||
bitmask = bitmask | (1ull << u8g2_esp32_hal.reset);
|
||||
}
|
||||
if (u8g2_esp32_hal.cs != U8G2_ESP32_HAL_UNDEFINED) {
|
||||
bitmask = bitmask | (1ull << u8g2_esp32_hal.cs);
|
||||
}
|
||||
|
||||
if (bitmask == 0) {
|
||||
if (bitmask == 0) {
|
||||
break;
|
||||
}
|
||||
gpio_config_t gpioConfig;
|
||||
gpioConfig.pin_bit_mask = bitmask;
|
||||
gpioConfig.mode = GPIO_MODE_OUTPUT;
|
||||
gpioConfig.pull_up_en = GPIO_PULLUP_DISABLE;
|
||||
gpioConfig.pull_down_en = GPIO_PULLDOWN_ENABLE;
|
||||
gpioConfig.intr_type = GPIO_INTR_DISABLE;
|
||||
gpio_config(&gpioConfig);
|
||||
break;
|
||||
}
|
||||
gpio_config_t gpioConfig;
|
||||
gpioConfig.pin_bit_mask = bitmask;
|
||||
gpioConfig.mode = GPIO_MODE_OUTPUT;
|
||||
gpioConfig.pull_up_en = GPIO_PULLUP_DISABLE;
|
||||
gpioConfig.pull_down_en = GPIO_PULLDOWN_ENABLE;
|
||||
gpioConfig.intr_type = GPIO_INTR_DISABLE;
|
||||
gpio_config(&gpioConfig);
|
||||
break;
|
||||
}
|
||||
|
||||
// Set the GPIO reset pin to the value passed in through arg_int.
|
||||
case U8X8_MSG_GPIO_RESET:
|
||||
if (u8g2_esp32_hal.reset != U8G2_ESP32_HAL_UNDEFINED) {
|
||||
gpio_set_level(u8g2_esp32_hal.reset, arg_int);
|
||||
}
|
||||
break;
|
||||
// Set the GPIO client select pin to the value passed in through arg_int.
|
||||
case U8X8_MSG_GPIO_CS:
|
||||
if (u8g2_esp32_hal.cs != U8G2_ESP32_HAL_UNDEFINED) {
|
||||
gpio_set_level(u8g2_esp32_hal.cs, arg_int);
|
||||
}
|
||||
break;
|
||||
// Set the Software I²C pin to the value passed in through arg_int.
|
||||
case U8X8_MSG_GPIO_I2C_CLOCK:
|
||||
if (u8g2_esp32_hal.scl != U8G2_ESP32_HAL_UNDEFINED) {
|
||||
gpio_set_level(u8g2_esp32_hal.scl, arg_int);
|
||||
// printf("%c",(arg_int==1?'C':'c'));
|
||||
}
|
||||
break;
|
||||
// Set the Software I²C pin to the value passed in through arg_int.
|
||||
case U8X8_MSG_GPIO_I2C_DATA:
|
||||
if (u8g2_esp32_hal.sda != U8G2_ESP32_HAL_UNDEFINED) {
|
||||
gpio_set_level(u8g2_esp32_hal.sda, arg_int);
|
||||
// printf("%c",(arg_int==1?'D':'d'));
|
||||
}
|
||||
break;
|
||||
// Set the GPIO reset pin to the value passed in through arg_int.
|
||||
case U8X8_MSG_GPIO_RESET:
|
||||
if (u8g2_esp32_hal.reset != U8G2_ESP32_HAL_UNDEFINED) {
|
||||
gpio_set_level(u8g2_esp32_hal.reset, arg_int);
|
||||
}
|
||||
break;
|
||||
// Set the GPIO client select pin to the value passed in through arg_int.
|
||||
case U8X8_MSG_GPIO_CS:
|
||||
if (u8g2_esp32_hal.cs != U8G2_ESP32_HAL_UNDEFINED) {
|
||||
gpio_set_level(u8g2_esp32_hal.cs, arg_int);
|
||||
}
|
||||
break;
|
||||
// Set the Software I²C pin to the value passed in through arg_int.
|
||||
case U8X8_MSG_GPIO_I2C_CLOCK:
|
||||
if (u8g2_esp32_hal.scl != U8G2_ESP32_HAL_UNDEFINED) {
|
||||
gpio_set_level(u8g2_esp32_hal.scl, arg_int);
|
||||
// printf("%c",(arg_int==1?'C':'c'));
|
||||
}
|
||||
break;
|
||||
// Set the Software I²C pin to the value passed in through arg_int.
|
||||
case U8X8_MSG_GPIO_I2C_DATA:
|
||||
if (u8g2_esp32_hal.sda != U8G2_ESP32_HAL_UNDEFINED) {
|
||||
gpio_set_level(u8g2_esp32_hal.sda, arg_int);
|
||||
// printf("%c",(arg_int==1?'D':'d'));
|
||||
}
|
||||
break;
|
||||
|
||||
// Delay for the number of milliseconds passed in through arg_int.
|
||||
case U8X8_MSG_DELAY_MILLI: vTaskDelay(arg_int / portTICK_PERIOD_MS); break;
|
||||
default: return 0;
|
||||
// Delay for the number of milliseconds passed in through arg_int.
|
||||
case U8X8_MSG_DELAY_MILLI: vTaskDelay(arg_int / portTICK_PERIOD_MS); break;
|
||||
default: return 0;
|
||||
}
|
||||
return 1;
|
||||
} // u8g2_esp32_gpio_and_delay_cb
|
||||
} // u8g2_esp32_gpio_and_delay_cb
|
@ -15,31 +15,36 @@
|
||||
|
||||
#define U8G2_ESP32_HAL_UNDEFINED (-1)
|
||||
|
||||
#define I2C_MASTER_NUM I2C_NUM_1 // I2C port number for master dev
|
||||
#define I2C_MASTER_TX_BUF_DISABLE 0 // I2C master do not need buffer
|
||||
#define I2C_MASTER_RX_BUF_DISABLE 0 // I2C master do not need buffer
|
||||
#define I2C_MASTER_FREQ_HZ 400000 // I2C master clock frequency
|
||||
#define ACK_CHECK_EN 0x1 // I2C master will check ack from slave
|
||||
#define ACK_CHECK_DIS 0x0 // I2C master will not check ack from slave
|
||||
#define I2C_MASTER_NUM I2C_NUM_1 // I2C port number for master dev
|
||||
#define I2C_MASTER_TX_BUF_DISABLE 0 // I2C master do not need buffer
|
||||
#define I2C_MASTER_RX_BUF_DISABLE 0 // I2C master do not need buffer
|
||||
#define I2C_MASTER_FREQ_HZ 400000 // I2C master clock frequency
|
||||
#define ACK_CHECK_EN 0x1 // I2C master will check ack from slave
|
||||
#define ACK_CHECK_DIS 0x0 // I2C master will not check ack from slave
|
||||
|
||||
typedef struct {
|
||||
gpio_num_t clk;
|
||||
gpio_num_t mosi;
|
||||
gpio_num_t sda; // data for I²C
|
||||
gpio_num_t scl; // clock for I²C
|
||||
gpio_num_t sda; // data for I²C
|
||||
gpio_num_t scl; // clock for I²C
|
||||
gpio_num_t cs;
|
||||
gpio_num_t reset;
|
||||
gpio_num_t dc;
|
||||
} u8g2_esp32_hal_t;
|
||||
|
||||
#define U8G2_ESP32_HAL_DEFAULT \
|
||||
{ \
|
||||
U8G2_ESP32_HAL_UNDEFINED, U8G2_ESP32_HAL_UNDEFINED, U8G2_ESP32_HAL_UNDEFINED, U8G2_ESP32_HAL_UNDEFINED, \
|
||||
U8G2_ESP32_HAL_UNDEFINED, U8G2_ESP32_HAL_UNDEFINED, U8G2_ESP32_HAL_UNDEFINED \
|
||||
#define U8G2_ESP32_HAL_DEFAULT \
|
||||
{ \
|
||||
U8G2_ESP32_HAL_UNDEFINED, U8G2_ESP32_HAL_UNDEFINED, \
|
||||
U8G2_ESP32_HAL_UNDEFINED, U8G2_ESP32_HAL_UNDEFINED, \
|
||||
U8G2_ESP32_HAL_UNDEFINED, U8G2_ESP32_HAL_UNDEFINED, \
|
||||
U8G2_ESP32_HAL_UNDEFINED \
|
||||
}
|
||||
|
||||
void u8g2_esp32_hal_init(u8g2_esp32_hal_t u8g2_esp32_hal_param);
|
||||
uint8_t u8g2_esp32_spi_byte_cb(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr);
|
||||
uint8_t u8g2_esp32_i2c_byte_cb(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr);
|
||||
uint8_t u8g2_esp32_gpio_and_delay_cb(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr);
|
||||
uint8_t u8g2_esp32_spi_byte_cb(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int,
|
||||
void *arg_ptr);
|
||||
uint8_t u8g2_esp32_i2c_byte_cb(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int,
|
||||
void *arg_ptr);
|
||||
uint8_t u8g2_esp32_gpio_and_delay_cb(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int,
|
||||
void *arg_ptr);
|
||||
#endif /* U8G2_ESP32_HAL_H_ */
|
@ -59,7 +59,8 @@ void setup_oled(void) {
|
||||
};
|
||||
u8g2_esp32_hal_init(u8g2_hal_config);
|
||||
|
||||
u8g2_Setup_ssd1306_i2c_128x64_noname_f(&u8g2, U8G2_R0, u8g2_esp32_i2c_byte_cb, u8g2_esp32_gpio_and_delay_cb);
|
||||
u8g2_Setup_ssd1306_i2c_128x64_noname_f(&u8g2, U8G2_R0, u8g2_esp32_i2c_byte_cb,
|
||||
u8g2_esp32_gpio_and_delay_cb);
|
||||
u8g2_InitDisplay(&u8g2);
|
||||
u8g2_ClearDisplay(&u8g2);
|
||||
u8g2_SetPowerSave(&u8g2, false);
|
||||
@ -120,9 +121,11 @@ void loraTask(void *params) {
|
||||
struct Packet recvd_packet;
|
||||
while (true) {
|
||||
TickType_t delay_ticks = next_send - current_time;
|
||||
BaseType_t didReceive = xQueueReceive(lora_packet_isr_queue, &packet_len, delay_ticks);
|
||||
BaseType_t didReceive =
|
||||
xQueueReceive(lora_packet_isr_queue, &packet_len, delay_ticks);
|
||||
if (didReceive) {
|
||||
int packetSize = (packet_len > LORA_BUF_LEN - 1) ? (LORA_BUF_LEN - 1) : (packet_len);
|
||||
int packetSize =
|
||||
(packet_len > LORA_BUF_LEN - 1) ? (LORA_BUF_LEN - 1) : (packet_len);
|
||||
// LoRa.setTimeout(50);
|
||||
// LoRa.readBytes(recvd_packet.buffer, packetSize);
|
||||
recvd_packet.buffer_len = packetSize;
|
||||
@ -134,13 +137,15 @@ void loraTask(void *params) {
|
||||
}
|
||||
current_time = xTaskGetTickCount();
|
||||
if (current_time >= next_send) {
|
||||
int written_bytes = snprintf(tx_buf, tx_buf_len, "hello world %d", packet_num);
|
||||
int written_bytes =
|
||||
snprintf(tx_buf, tx_buf_len, "hello world %d", packet_num);
|
||||
if (written_bytes < 0) {
|
||||
ESP_LOGE(TAG, "snprintf error: %d", written_bytes);
|
||||
continue;
|
||||
}
|
||||
packet_num++;
|
||||
esp_err_t ret = sx127x_send_packet(lora, tx_buf, written_bytes, 0); // 0 means error if queue full
|
||||
esp_err_t ret = sx127x_send_packet(lora, tx_buf, written_bytes,
|
||||
0); // 0 means error if queue full
|
||||
if (ret != ESP_OK) {
|
||||
ESP_LOGE(TAG, "error sending packet: %d", ret);
|
||||
} else {
|
||||
@ -166,16 +171,13 @@ void loop(void) {
|
||||
u8g2_DrawStr(&u8g2, 4, 8, "Hello World!");
|
||||
char buf[32];
|
||||
memset(buf, 0, 32);
|
||||
snprintf(buf, 32, "heap allc/free %d/%d", heap_info.total_allocated_bytes, heap_info.total_free_bytes);
|
||||
snprintf(buf, 32, "heap allc/free %d/%d", heap_info.total_allocated_bytes,
|
||||
heap_info.total_free_bytes);
|
||||
u8g2_DrawStr(&u8g2, 4, 8 + 8, buf);
|
||||
|
||||
if (packet.buffer_len) {
|
||||
ESP_LOGI(TAG,
|
||||
"lora received packet (len %d, rssi: %d, snr: %f): %s\n",
|
||||
packet.buffer_len,
|
||||
packet.rssi,
|
||||
packet.snr,
|
||||
packet.buffer);
|
||||
ESP_LOGI(TAG, "lora received packet (len %d, rssi: %d, snr: %f): %s\n",
|
||||
packet.buffer_len, packet.rssi, packet.snr, packet.buffer);
|
||||
u8g2_SetFont(&u8g2, u8g2_font_4x6_mf);
|
||||
snprintf(buf, 40, "lora pkt(rssi: %d, snr: %f)", packet.rssi, packet.snr);
|
||||
u8g2_DrawStr(&u8g2, 4, 8 + 8 + 8, buf);
|
||||
@ -193,4 +195,6 @@ void loopTask(void *pvUser) {
|
||||
}
|
||||
}
|
||||
|
||||
void app_main() { xTaskCreatePinnedToCore(loopTask, "loopTask", 8192, NULL, 1, NULL, 1); }
|
||||
void app_main() {
|
||||
xTaskCreatePinnedToCore(loopTask, "loopTask", 8192, NULL, 1, NULL, 1);
|
||||
}
|
||||
|
Loading…
x
Reference in New Issue
Block a user