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533 lines
17 KiB
533 lines
17 KiB
/* |
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u8x8_d_ssd1322.c |
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Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/) |
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Copyright (c) 2016, olikraus@gmail.com |
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All rights reserved. |
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Redistribution and use in source and binary forms, with or without modification, |
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are permitted provided that the following conditions are met: |
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* Redistributions of source code must retain the above copyright notice, this list |
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of conditions and the following disclaimer. |
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* Redistributions in binary form must reproduce the above copyright notice, this |
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list of conditions and the following disclaimer in the documentation and/or other |
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materials provided with the distribution. |
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND |
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CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, |
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INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
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MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR |
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CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
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STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF |
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ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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SSD1322: |
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480 x 128 dot matrix |
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16 gray scale |
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*/ |
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#include "u8x8.h" |
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static const uint8_t u8x8_d_ssd1322_powersave0_seq[] = { |
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ |
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U8X8_C(0x0af), /* ssd1322: display on */ |
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U8X8_END_TRANSFER(), /* disable chip */ |
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U8X8_END() /* end of sequence */ |
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}; |
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static const uint8_t u8x8_d_ssd1322_powersave1_seq[] = { |
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ |
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U8X8_C(0x0ae), /* ssd1322: display off */ |
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U8X8_END_TRANSFER(), /* disable chip */ |
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U8X8_END() /* end of sequence */ |
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}; |
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/* interpret b as a monochrome bit pattern, write value 15 for high bit and value 0 for a low bit */ |
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/* topbit (msb) is sent last */ |
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/* example: b = 0x083 will send 0xff, 0x00, 0x00, 0xf0 */ |
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/* 4 Jan 2017: I think this procedure not required any more. Delete? */ |
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/* |
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static uint8_t u8x8_write_byte_to_16gr_device(u8x8_t *u8x8, uint8_t b) |
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{ |
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static uint8_t buf[4]; |
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static uint8_t map[4] = { 0, 0x00f, 0x0f0, 0x0ff }; |
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buf [3] = map[b & 3]; |
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b>>=2; |
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buf [2] = map[b & 3]; |
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b>>=2; |
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buf [1] = map[b & 3]; |
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b>>=2; |
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buf [0] = map[b & 3]; |
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return u8x8_cad_SendData(u8x8, 4, buf); |
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} |
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*/ |
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/* |
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input: |
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one tile (8 Bytes) |
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output: |
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Tile for SSD1325 (32 Bytes) |
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*/ |
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static uint8_t u8x8_ssd1322_to32_dest_buf[32]; |
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static uint8_t *u8x8_ssd1322_8to32(U8X8_UNUSED u8x8_t *u8x8, uint8_t *ptr) |
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{ |
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uint8_t v; |
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uint8_t a,b; |
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uint8_t i, j; |
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uint8_t *dest; |
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for( j = 0; j < 4; j++ ) |
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{ |
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dest = u8x8_ssd1322_to32_dest_buf; |
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dest += j; |
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a =*ptr; |
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ptr++; |
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b = *ptr; |
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ptr++; |
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for( i = 0; i < 8; i++ ) |
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{ |
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v = 0; |
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if ( a&1 ) v |= 0xf0; |
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if ( b&1 ) v |= 0x0f; |
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*dest = v; |
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dest+=4; |
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a >>= 1; |
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b >>= 1; |
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} |
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} |
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return u8x8_ssd1322_to32_dest_buf; |
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} |
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static uint8_t *u8x8_ssd1322_4to32(U8X8_UNUSED u8x8_t *u8x8, uint8_t *ptr) |
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{ |
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uint8_t v; |
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uint8_t a; |
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uint8_t i, j; |
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uint8_t *dest; |
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for( j = 0; j < 4; j++ ) |
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{ |
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dest = u8x8_ssd1322_to32_dest_buf; |
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dest += j; |
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a =*ptr; |
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ptr++; |
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for( i = 0; i < 8; i++ ) |
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{ |
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v = 0; |
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if ( a&1 ) v = 0xff; |
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*dest = v; |
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dest+=4; |
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a >>= 1; |
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} |
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} |
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return u8x8_ssd1322_to32_dest_buf; |
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} |
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uint8_t u8x8_d_ssd1322_common(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) |
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{ |
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uint8_t x; |
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uint8_t y, c; |
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uint8_t *ptr; |
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switch(msg) |
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{ |
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/* U8X8_MSG_DISPLAY_SETUP_MEMORY is handled by the calling function */ |
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/* |
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case U8X8_MSG_DISPLAY_SETUP_MEMORY: |
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break; |
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case U8X8_MSG_DISPLAY_INIT: |
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u8x8_d_helper_display_init(u8x8); |
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1322_256x64_init_seq); |
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break; |
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*/ |
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case U8X8_MSG_DISPLAY_SET_POWER_SAVE: |
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if ( arg_int == 0 ) |
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1322_powersave0_seq); |
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else |
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1322_powersave1_seq); |
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break; |
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#ifdef U8X8_WITH_SET_CONTRAST |
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case U8X8_MSG_DISPLAY_SET_CONTRAST: |
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u8x8_cad_StartTransfer(u8x8); |
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u8x8_cad_SendCmd(u8x8, 0x0C1 ); |
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u8x8_cad_SendArg(u8x8, arg_int ); /* ssd1322 has range from 0 to 255 */ |
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u8x8_cad_EndTransfer(u8x8); |
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break; |
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#endif |
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case U8X8_MSG_DISPLAY_DRAW_TILE: |
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u8x8_cad_StartTransfer(u8x8); |
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x = ((u8x8_tile_t *)arg_ptr)->x_pos; |
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x *= 2; // only every 4th col can be addressed |
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x += u8x8->x_offset; |
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y = (((u8x8_tile_t *)arg_ptr)->y_pos); |
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y *= 8; |
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u8x8_cad_SendCmd(u8x8, 0x075 ); /* set row address, moved out of the loop (issue 302) */ |
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u8x8_cad_SendArg(u8x8, y); |
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u8x8_cad_SendArg(u8x8, y+7); |
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do |
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{ |
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c = ((u8x8_tile_t *)arg_ptr)->cnt; |
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ptr = ((u8x8_tile_t *)arg_ptr)->tile_ptr; |
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do |
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{ |
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u8x8_cad_SendCmd(u8x8, 0x015 ); /* set column address */ |
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u8x8_cad_SendArg(u8x8, x ); /* start */ |
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u8x8_cad_SendArg(u8x8, x+1 ); /* end */ |
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u8x8_cad_SendCmd(u8x8, 0x05c ); /* write to ram */ |
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u8x8_cad_SendData(u8x8, 32, u8x8_ssd1322_8to32(u8x8, ptr)); |
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ptr += 8; |
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x += 2; |
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c--; |
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} while( c > 0 ); |
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//x += 2; |
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arg_int--; |
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} while( arg_int > 0 ); |
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u8x8_cad_EndTransfer(u8x8); |
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break; |
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default: |
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return 0; |
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} |
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return 1; |
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} |
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/*=========================================================*/ |
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static const uint8_t u8x8_d_ssd1322_256x64_flip0_seq[] = { |
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ |
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U8X8_CAA(0x0a0, 0x006, 0x011), /* remap */ |
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U8X8_END_TRANSFER(), /* disable chip */ |
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U8X8_END() /* end of sequence */ |
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}; |
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static const uint8_t u8x8_d_ssd1322_256x64_flip1_seq[] = { |
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ |
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U8X8_CAA(0x0a0, 0x014, 0x011), /* remap */ |
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U8X8_END_TRANSFER(), /* disable chip */ |
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U8X8_END() /* end of sequence */ |
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}; |
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static const u8x8_display_info_t u8x8_ssd1322_256x64_display_info = |
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{ |
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/* chip_enable_level = */ 0, |
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/* chip_disable_level = */ 1, |
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/* post_chip_enable_wait_ns = */ 20, |
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/* pre_chip_disable_wait_ns = */ 10, |
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/* reset_pulse_width_ms = */ 100, /* SSD1322: 2 us */ |
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/* post_reset_wait_ms = */ 100, /* far east OLEDs need much longer setup time */ |
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/* sda_setup_time_ns = */ 50, /* SSD1322: 15ns, but cycle time is 100ns, so use 100/2 */ |
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/* sck_pulse_width_ns = */ 50, /* SSD1322: 20ns, but cycle time is 100ns, so use 100/2, AVR: below 70: 8 MHz, >= 70 --> 4MHz clock */ |
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/* sck_clock_hz = */ 10000000UL, /* since Arduino 1.6.0, the SPI bus speed in Hz. Should be 1000000000/sck_pulse_width_ns, increased to 8MHz (issue 215), 10 MHz (issue 301) */ |
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/* spi_mode = */ 0, /* active high, rising edge */ |
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/* i2c_bus_clock_100kHz = */ 4, |
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/* data_setup_time_ns = */ 10, |
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/* write_pulse_width_ns = */ 150, /* SSD1322: cycle time is 300ns, so use 300/2 = 150 */ |
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/* tile_width = */ 32, /* 256 pixel, so we require 32 bytes for this */ |
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/* tile_hight = */ 8, |
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/* default_x_offset = */ 0x01c, /* this is the byte offset (there are two pixel per byte with 4 bit per pixel) */ |
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/* flipmode_x_offset = */ 0x01c, |
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/* pixel_width = */ 256, |
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/* pixel_height = */ 64 |
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}; |
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static const uint8_t u8x8_d_ssd1322_256x64_init_seq[] = { |
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U8X8_DLY(1), |
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ |
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U8X8_DLY(1), |
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U8X8_CA(0xfd, 0x12), /* unlock */ |
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U8X8_C(0xae), /* display off */ |
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U8X8_CA(0xb3, 0x91), /* set display clock divide ratio/oscillator frequency (set clock as 80 frames/sec) */ |
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U8X8_CA(0xca, 0x3f), /* multiplex ratio 1/64 Duty (0x0F~0x3F) */ |
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U8X8_CA(0xa2, 0x00), /* display offset, shift mapping ram counter */ |
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U8X8_CA(0xa1, 0x00), /* display start line */ |
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//U8X8_CAA(0xa0, 0x14, 0x11), /* Set Re-Map / Dual COM Line Mode */ |
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U8X8_CAA(0xa0, 0x06, 0x011), /* Set Re-Map / Dual COM Line Mode */ |
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U8X8_CA(0xab, 0x01), /* Enable Internal VDD Regulator */ |
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U8X8_CAA(0xb4, 0xa0, 0x005|0x0fd), /* Display Enhancement A */ |
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U8X8_CA(0xc1, 0x9f), /* contrast */ |
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U8X8_CA(0xc7, 0x0f), /* Set Scale Factor of Segment Output Current Control */ |
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U8X8_C(0xb9), /* linear grayscale */ |
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U8X8_CA(0xb1, 0xe2), /* Phase 1 (Reset) & Phase 2 (Pre-Charge) Period Adjustment */ |
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U8X8_CAA(0xd1, 0x082|0x020, 0x020), /* Display Enhancement B */ |
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U8X8_CA(0xbb, 0x1f), /* precharge voltage */ |
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U8X8_CA(0xb6, 0x08), /* precharge period */ |
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U8X8_CA(0xbe, 0x07), /* vcomh */ |
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U8X8_C(0xa6), /* normal display */ |
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U8X8_C(0xa9), /* exit partial display */ |
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U8X8_DLY(1), /* delay 2ms */ |
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U8X8_END_TRANSFER(), /* disable chip */ |
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U8X8_END() /* end of sequence */ |
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}; |
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uint8_t u8x8_d_ssd1322_nhd_256x64(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) |
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{ |
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switch(msg) |
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{ |
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case U8X8_MSG_DISPLAY_SETUP_MEMORY: |
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u8x8_d_helper_display_setup_memory(u8x8, &u8x8_ssd1322_256x64_display_info); |
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break; |
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case U8X8_MSG_DISPLAY_INIT: |
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u8x8_d_helper_display_init(u8x8); |
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1322_256x64_init_seq); |
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break; |
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case U8X8_MSG_DISPLAY_SET_FLIP_MODE: |
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if ( arg_int == 0 ) |
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{ |
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1322_256x64_flip0_seq); |
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u8x8->x_offset = u8x8->display_info->default_x_offset; |
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} |
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else |
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{ |
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1322_256x64_flip1_seq); |
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u8x8->x_offset = u8x8->display_info->flipmode_x_offset; |
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} |
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break; |
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default: |
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return u8x8_d_ssd1322_common(u8x8, msg, arg_int, arg_ptr); |
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} |
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return 1; |
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} |
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/*=========================================================*/ |
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/* |
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NHD-2.7-12864WDW3-M |
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http://www.newhavendisplay.com/nhd2712864wdw3m-p-9546.html |
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http://www.newhavendisplay.com/specs/NHD-2.7-12864WDW3-M.pdf |
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It looks like that only every second pixel is connected to the OLED |
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*/ |
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uint8_t u8x8_d_ssd1322_common2(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) |
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{ |
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uint8_t x; |
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uint8_t y, c; |
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uint8_t *ptr; |
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switch(msg) |
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{ |
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/* U8X8_MSG_DISPLAY_SETUP_MEMORY is handled by the calling function */ |
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/* |
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case U8X8_MSG_DISPLAY_SETUP_MEMORY: |
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break; |
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case U8X8_MSG_DISPLAY_INIT: |
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u8x8_d_helper_display_init(u8x8); |
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1322_256x64_init_seq); |
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break; |
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*/ |
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case U8X8_MSG_DISPLAY_SET_POWER_SAVE: |
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if ( arg_int == 0 ) |
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1322_powersave0_seq); |
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else |
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1322_powersave1_seq); |
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break; |
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#ifdef U8X8_WITH_SET_CONTRAST |
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case U8X8_MSG_DISPLAY_SET_CONTRAST: |
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u8x8_cad_StartTransfer(u8x8); |
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u8x8_cad_SendCmd(u8x8, 0x0C1 ); |
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u8x8_cad_SendArg(u8x8, arg_int ); /* ssd1322 has range from 0 to 255 */ |
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u8x8_cad_EndTransfer(u8x8); |
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break; |
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#endif |
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case U8X8_MSG_DISPLAY_DRAW_TILE: |
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u8x8_cad_StartTransfer(u8x8); |
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x = ((u8x8_tile_t *)arg_ptr)->x_pos; |
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x *= 2; // only every 4th col can be addressed |
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x *= 2; // only every second pixel is used in the 128x64 NHD OLED |
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x += u8x8->x_offset; |
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y = (((u8x8_tile_t *)arg_ptr)->y_pos); |
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y *= 8; |
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u8x8_cad_SendCmd(u8x8, 0x075 ); /* set row address, moved out of the loop (issue 302) */ |
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u8x8_cad_SendArg(u8x8, y); |
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u8x8_cad_SendArg(u8x8, y+7); |
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do |
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{ |
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c = ((u8x8_tile_t *)arg_ptr)->cnt; |
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ptr = ((u8x8_tile_t *)arg_ptr)->tile_ptr; |
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do |
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{ |
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u8x8_cad_SendCmd(u8x8, 0x015 ); /* set column address */ |
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u8x8_cad_SendArg(u8x8, x ); /* start */ |
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u8x8_cad_SendArg(u8x8, x+1 ); /* end */ |
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u8x8_cad_SendCmd(u8x8, 0x05c ); /* write to ram */ |
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u8x8_cad_SendData(u8x8, 32, u8x8_ssd1322_4to32(u8x8, ptr)); |
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ptr += 4; |
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x += 2; |
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u8x8_cad_SendCmd(u8x8, 0x015 ); /* set column address */ |
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u8x8_cad_SendArg(u8x8, x ); /* start */ |
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u8x8_cad_SendArg(u8x8, x+1 ); /* end */ |
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u8x8_cad_SendCmd(u8x8, 0x05c ); /* write to ram */ |
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u8x8_cad_SendData(u8x8, 32, u8x8_ssd1322_4to32(u8x8, ptr)); |
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ptr += 4; |
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x += 2; |
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c--; |
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} while( c > 0 ); |
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//x += 2; |
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arg_int--; |
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} while( arg_int > 0 ); |
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u8x8_cad_EndTransfer(u8x8); |
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break; |
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default: |
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return 0; |
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} |
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return 1; |
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} |
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static const uint8_t u8x8_d_ssd1322_128x64_flip0_seq[] = { |
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ |
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U8X8_CAA(0x0a0, 0x016, 0x011), /* remap */ |
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U8X8_END_TRANSFER(), /* disable chip */ |
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U8X8_END() /* end of sequence */ |
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}; |
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static const uint8_t u8x8_d_ssd1322_128x64_flip1_seq[] = { |
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ |
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U8X8_CAA(0x0a0, 0x004, 0x011), /* remap */ |
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U8X8_END_TRANSFER(), /* disable chip */ |
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U8X8_END() /* end of sequence */ |
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}; |
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static const u8x8_display_info_t u8x8_ssd1322_128x64_display_info = |
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{ |
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/* chip_enable_level = */ 0, |
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/* chip_disable_level = */ 1, |
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/* post_chip_enable_wait_ns = */ 20, |
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/* pre_chip_disable_wait_ns = */ 10, |
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/* reset_pulse_width_ms = */ 100, /* SSD1322: 2 us */ |
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/* post_reset_wait_ms = */ 100, /* far east OLEDs need much longer setup time */ |
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/* sda_setup_time_ns = */ 50, /* SSD1322: 15ns, but cycle time is 100ns, so use 100/2 */ |
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/* sck_pulse_width_ns = */ 50, /* SSD1322: 20ns, but cycle time is 100ns, so use 100/2, AVR: below 70: 8 MHz, >= 70 --> 4MHz clock */ |
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/* sck_clock_hz = */ 10000000UL, /* since Arduino 1.6.0, the SPI bus speed in Hz. Should be 1000000000/sck_pulse_width_ns, increased to 8MHz (issue 215), 10 MHz (issue 301) */ |
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/* spi_mode = */ 0, /* active high, rising edge */ |
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/* i2c_bus_clock_100kHz = */ 4, |
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/* data_setup_time_ns = */ 10, |
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/* write_pulse_width_ns = */ 150, /* SSD1322: cycle time is 300ns, so use 300/2 = 150 */ |
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/* tile_width = */ 16, /* 128 pixel */ |
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/* tile_hight = */ 8, |
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/* default_x_offset = */ 28, /* this is the byte offset (there are two pixel per byte with 4 bit per pixel) */ |
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/* flipmode_x_offset = */ 28, |
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/* pixel_width = */ 128, |
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/* pixel_height = */ 64 |
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}; |
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|
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static const uint8_t u8x8_d_ssd1322_128x64_init_seq[] = { |
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U8X8_DLY(1), |
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */ |
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U8X8_DLY(1), |
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|
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U8X8_CA(0xfd, 0x12), /* unlock */ |
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U8X8_C(0xae), /* display off */ |
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U8X8_CA(0xb3, 0x91), /* set display clock divide ratio/oscillator frequency (set clock as 80 frames/sec) */ |
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U8X8_CA(0xca, 0x3f), /* multiplex ratio 1/64 Duty (0x0F~0x3F) */ |
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U8X8_CA(0xa2, 0x00), /* display offset, shift mapping ram counter */ |
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|
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U8X8_CA(0xa1, 0x00), /* display start line */ |
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U8X8_CA(0xab, 0x01), /* Enable Internal VDD Regulator */ |
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//U8X8_CAA(0xa0, 0x14, 0x11), /* Set Re-Map / Dual COM Line Mode */ |
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//U8X8_CAA(0xa0, 0x06, 0x011), /* Set Re-Map / Dual COM Line Mode */ |
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U8X8_CAA(0xa0, 0x16, 0x011), /* Set Re-Map / Dual COM Line Mode (NHD-2.7-12864WDW3-M datasheet) */ |
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U8X8_CA(0xc7, 0x0f), /* Set Scale Factor of Segment Output Current Control */ |
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U8X8_CA(0xc1, 0x9f), /* contrast */ |
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//U8X8_CA(0xb1, 0xe2), /* Phase 1 (Reset) & Phase 2 (Pre-Charge) Period Adjustment */ |
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U8X8_CA(0xb1, 0xf2), /* Phase 1 (Reset) & Phase 2 (Pre-Charge) Period Adjustment (NHD-2.7-12864WDW3-M datasheet) */ |
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U8X8_CA(0xbb, 0x1f), /* precharge voltage */ |
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//U8X8_CAA(0xb4, 0xa0, 0x005|0x0fd), /* Display Enhancement A */ |
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U8X8_CAA(0xb4, 0xa0, 0x0fd), /* Display Enhancement A (NHD-2.7-12864WDW3-M datasheet) */ |
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U8X8_CA(0xbe, 0x04), /* vcomh (NHD-2.7-12864WDW3-M datasheet) */ |
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U8X8_C(0xb9), /* linear grayscale */ |
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//U8X8_CAA(0xd1, 0x082|0x020, 0x020), /* Display Enhancement B */ |
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//U8X8_CA(0xb6, 0x08), /* precharge period */ |
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U8X8_C(0xa6), /* normal display */ |
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U8X8_C(0xa9), /* exit partial display */ |
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|
|
|
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U8X8_DLY(1), /* delay 2ms */ |
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|
|
|
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U8X8_END_TRANSFER(), /* disable chip */ |
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U8X8_END() /* end of sequence */ |
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}; |
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|
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uint8_t u8x8_d_ssd1322_nhd_128x64(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) |
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{ |
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switch(msg) |
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{ |
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case U8X8_MSG_DISPLAY_SETUP_MEMORY: |
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u8x8_d_helper_display_setup_memory(u8x8, &u8x8_ssd1322_128x64_display_info); |
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break; |
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case U8X8_MSG_DISPLAY_INIT: |
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u8x8_d_helper_display_init(u8x8); |
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1322_128x64_init_seq); |
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break; |
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case U8X8_MSG_DISPLAY_SET_FLIP_MODE: |
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if ( arg_int == 0 ) |
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{ |
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1322_128x64_flip0_seq); |
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u8x8->x_offset = u8x8->display_info->default_x_offset; |
|
} |
|
else |
|
{ |
|
u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1322_128x64_flip1_seq); |
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u8x8->x_offset = u8x8->display_info->flipmode_x_offset; |
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} |
|
break; |
|
|
|
default: |
|
return u8x8_d_ssd1322_common2(u8x8, msg, arg_int, arg_ptr); |
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} |
|
return 1; |
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} |
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