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fix writing fifo

ugv_io
Alex Mikhalev 6 years ago
parent
commit
d8c132319f
  1. 4
      components/sx127x_driver/sx127x_registers.c

4
components/sx127x_driver/sx127x_registers.c

@ -256,7 +256,7 @@ esp_err_t sx127x_write_fifo(sx127x_t *hndl, const char *data, size_t data_len) { @@ -256,7 +256,7 @@ esp_err_t sx127x_write_fifo(sx127x_t *hndl, const char *data, size_t data_len) {
spi_transaction_t trans;
memset(&trans, 0, sizeof(trans));
trans.flags = 0;
trans.addr = SX127X_REG_FIFO;
trans.addr = SX127X_REG_FIFO | 0x80;
trans.length = 8 * data_len;
trans.tx_buffer = data;
trans.rxlength = 0;
@ -281,7 +281,7 @@ esp_err_t sx127x_read_fifo(sx127x_t *hndl, char *data_out, size_t data_len) { @@ -281,7 +281,7 @@ esp_err_t sx127x_read_fifo(sx127x_t *hndl, char *data_out, size_t data_len) {
trans.addr = SX127X_REG_FIFO;
trans.length = 8 * data_len;
trans.tx_buffer = NULL;
trans.rxlength = 0; // match length
trans.rxlength = 8 * data_len;
trans.rx_buffer = data_out;
BaseType_t pdRet = xSemaphoreTake(hndl->spi_mutex, SX127X_MUTEX_TIMOUT);

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