#include "sx127x_driver.h"

#ifdef __cplusplus
extern "C" {
#endif

typedef enum sx127x_reg {
  SX127X_REG_FIFO                 = 0x00,
  SX127X_REG_OP_MODE              = 0x01,
  SX127X_REG_FRF_MSB              = 0x06,
  SX127X_REG_FRF_MID              = 0x07,
  SX127X_REG_FRF_LSB              = 0x08,
  SX127X_REG_PA_CONFIG            = 0x09,
  SX127X_REG_OCP                  = 0x0b,
  SX127X_REG_LNA                  = 0x0c,
  SX127X_REG_FIFO_ADDR_PTR        = 0x0d,
  SX127X_REG_FIFO_TX_BASE_ADDR    = 0x0e,
  SX127X_REG_FIFO_RX_BASE_ADDR    = 0x0f,
  SX127X_REG_FIFO_RX_CURRENT_ADDR = 0x10,
  SX127X_REG_IRQ_FLAGS            = 0x12,
  SX127X_REG_RX_NB_BYTES          = 0x13,
  SX127X_REG_PKT_SNR_VALUE        = 0x19,
  SX127X_REG_PKT_RSSI_VALUE       = 0x1a,
  SX127X_REG_RSSI_VALUE           = 0x1b,
  SX127X_REG_MODEM_CONFIG_1       = 0x1d,
  SX127X_REG_MODEM_CONFIG_2       = 0x1e,
  SX127X_REG_PREAMBLE_MSB         = 0x20,
  SX127X_REG_PREAMBLE_LSB         = 0x21,
  SX127X_REG_PAYLOAD_LENGTH       = 0x22,
  SX127X_REG_MODEM_CONFIG_3       = 0x26,
  SX127X_REG_FREQ_ERROR_MSB       = 0x28,
  SX127X_REG_FREQ_ERROR_MID       = 0x29,
  SX127X_REG_FREQ_ERROR_LSB       = 0x2a,
  SX127X_REG_RSSI_WIDEBAND        = 0x2c,
  SX127X_REG_DETECTION_OPTIMIZE   = 0x31,
  SX127X_REG_INVERTIQ             = 0x33,
  SX127X_REG_DETECTION_THRESHOLD  = 0x37,
  SX127X_REG_SYNC_WORD            = 0x39,
  SX127X_REG_INVERTIQ2            = 0x3b,
  SX127X_REG_DIO_MAPPING_1        = 0x40,
  SX127X_REG_VERSION              = 0x42,
  SX127X_REG_PA_DAC               = 0x4d,
} sx127x_reg_t;

typedef enum sx127x_op_mode {
  SX127X_MODE_SLEEP     = 0x00,
  SX127X_MODE_STDBY     = 0x01,
  SX127X_MODE_FS_TX     = 0x02,
  SX127X_MODE_TX        = 0x03,
  SX127X_MODE_FS_RX     = 0x04,
  SX127X_MODE_RX_CONT   = 0x05,
  SX127X_MODE_RX_SINGLE = 0x06,
  SX127X_MODE_CAD       = 0x07,
  SX127X_MODE           = 0x07,
  SX127X_LONG_RANGE     = (1 << 7)
} sx127x_op_mode_t;

#define SX127X_CONFIG2_CRC 0x04
#define SX127X_CONFIG3_AUTO_AGC 0x04

// PA config
#define SX127X_PA_BOOST 0x80

// IRQ masks
#define SX127X_IRQ_TX_DONE_MASK 0x08
#define SX127X_IRQ_PAYLOAD_CRC_ERROR_MASK 0x20
#define SX127X_IRQ_RX_DONE_MASK 0x40

esp_err_t sx127x_read_register(sx127x_hndl hdnl, sx127x_reg_t reg,
                               uint8_t *value);
esp_err_t sx127x_write_register(sx127x_hndl hdnl, sx127x_reg_t reg,
                                uint8_t value);
esp_err_t sx127x_single_transfer(sx127x_hndl hdnl, sx127x_reg_t addr,
                                 uint8_t to_slave, uint8_t *from_slave);

esp_err_t sx127x_sleep(sx127x_hndl hdnl);

esp_err_t sx127x_standby(sx127x_hndl hdnl);

esp_err_t sx127x_set_frequency(sx127x_hndl hdnl, uint64_t frequency);

esp_err_t sx127x_set_tx_power(sx127x_hndl hdnl, uint8_t tx_power,
                              sx127x_pa_boost_t pa_boost);

esp_err_t sx127x_set_spreading_factor(sx127x_hndl hdnl,
                                      uint8_t     spreading_factor);

esp_err_t sx127x_set_signal_bandwidth(sx127x_hndl hdnl,
                                      uint64_t    signal_bandwidth);
uint8_t   sx127x_bw_to_reg(uint64_t bandwidth);
uint64_t  sx127x_reg_to_bw(uint8_t bandwidth_reg);

esp_err_t sx127x_set_sync_word(sx127x_hndl hdnl, uint8_t sync_word);

esp_err_t sx127x_set_crc(sx127x_hndl hdnl, sx127x_crc_t crc);

esp_err_t sx127x_read_pkt_rssi(sx127x_hndl hdnl, int32_t *rssi);
esp_err_t sx127x_read_pkt_snr(sx127x_hndl hdnl, int8_t *snr);
esp_err_t sx127x_read_rssi(sx127x_hndl hdnl, int32_t *rssi);
esp_err_t sx127x_read_lna_gain(sx127x_hndl hdnl, uint8_t *lna_gain);

esp_err_t sx127x_write_fifo(sx127x_hndl hdnl, const uint8_t *data,
                            size_t data_len);
esp_err_t sx127x_read_fifo(sx127x_hndl hdnl, uint8_t *data_out, size_t data_len);

#ifdef __cplusplus
}
#endif